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公开(公告)号:US09184065B2
公开(公告)日:2015-11-10
申请号:US14590383
申请日:2015-01-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jun-young Ko , Jae-yong Park , Heui-seog Kim , Ho-geon Song
IPC: H01L21/00 , H01L21/52 , H01L21/56 , H01L25/065
CPC classification number: H01L21/52 , H01L21/56 , H01L21/565 , H01L25/0657 , H01L2224/16225 , H01L2224/48227 , H01L2225/06562
Abstract: A method of molding a semiconductor package includes coating liquid molding resin or disposing solid molding resin on a top surface of a semiconductor chip arranged on a substrate. The solid molding resin may include powdered molding resin or sheet-type molding resin. In a case where liquid molding resin is coated on the top surface of the semiconductor chip, the substrate is mounted between a lower molding and an upper molding, and then melted molding resin is filled in a space between the lower molding and the upper molding. In a case where the solid molding resin is disposed on the top surface of the semiconductor chip, the substrate is mounted on a lower mold and then the solid molding resin is heated and melts into liquid molding resin having flowability. An upper mold is mounted on the lower mold, and melted molding resin is filled in a space between the lower molding and the upper molding.
Abstract translation: 模制半导体封装的方法包括在设置在基板上的半导体芯片的顶表面上涂布液体模制树脂或将固体模塑树脂设置。 固体成型树脂可以包括粉末成型树脂或片状模塑树脂。 在半导体芯片的上表面上涂布有液态成型树脂的情况下,将基板安装在下模和上模之间,然后将熔融模制树脂填充在下模和上模之间的空间中。 在固体成形树脂设置在半导体芯片的顶面的情况下,将基板安装在下模上,然后将固体成型树脂加热熔融成具有流动性的液态成型树脂。 上模具安装在下模具上,熔融模塑树脂填充在下模和上模之间的空间中。
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公开(公告)号:US09136260B2
公开(公告)日:2015-09-15
申请号:US14093853
申请日:2013-12-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jung-seok Ahn , Dong-hyeon Jang , Ho-geon Song , Sung-jun Im , Chang-seong Jeon , Teak-hoon Lee , Sang-sick Park
IPC: H01L25/00 , H01L23/48 , H01L21/56 , H01L23/00 , H01L25/065 , H01L21/768 , H01L21/683 , H01L25/18
CPC classification number: H01L25/50 , H01L21/561 , H01L21/6835 , H01L21/76898 , H01L23/3192 , H01L23/481 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/92 , H01L24/94 , H01L24/97 , H01L25/0657 , H01L25/18 , H01L2221/68327 , H01L2221/68381 , H01L2224/0346 , H01L2224/0401 , H01L2224/05008 , H01L2224/05009 , H01L2224/05568 , H01L2224/0557 , H01L2224/05572 , H01L2224/05624 , H01L2224/05647 , H01L2224/06181 , H01L2224/11009 , H01L2224/131 , H01L2224/13124 , H01L2224/13144 , H01L2224/13147 , H01L2224/16145 , H01L2224/16225 , H01L2224/17181 , H01L2224/2929 , H01L2224/29387 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2224/83191 , H01L2224/83192 , H01L2224/83851 , H01L2224/92125 , H01L2224/92143 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06544 , H01L2225/06568 , H01L2924/00014 , H01L2924/01327 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/18161 , H01L2224/81 , H01L2224/11 , H01L2224/03 , H01L2924/014 , H01L2924/00012 , H01L2924/00 , H01L2224/05552
Abstract: A method of manufacturing a chip-stacked semiconductor package, the method including preparing a base wafer including a plurality of first chips each having a through-silicon via (TSV); bonding the base wafer including the plurality of first chips to a supporting carrier; preparing a plurality of second chips; forming stacked chips by bonding the plurality of second chips to the plurality of first chips; sealing the stacked chips with a sealing portion; and separating the stacked chips from each other.
Abstract translation: 一种制造芯片堆叠的半导体封装的方法,所述方法包括制备包括多个第一芯片的基片,每个第一芯片均具有穿硅通孔(TSV); 将包括多个第一芯片的基底晶片接合到支撑载体; 准备多个第二芯片; 通过将所述多个第二芯片接合到所述多个第一芯片来形成堆叠的芯片; 用密封部分密封堆叠的芯片; 并将堆叠的芯片彼此分离。
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公开(公告)号:US20150118798A1
公开(公告)日:2015-04-30
申请号:US14590383
申请日:2015-01-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jun-young Ko , Jae-yong Park , Heui-seog Kim , Ho-geon Song
CPC classification number: H01L21/52 , H01L21/56 , H01L21/565 , H01L25/0657 , H01L2224/16225 , H01L2224/48227 , H01L2225/06562
Abstract: A method of molding a semiconductor package includes coating liquid molding resin or disposing solid molding resin on a top surface of a semiconductor chip arranged on a substrate. The solid molding resin may include powdered molding resin or sheet-type molding resin. In a case where liquid molding resin is coated on the top surface of the semiconductor chip, the substrate is mounted between a lower molding and an upper molding, and then melted molding resin is filled in a space between the lower molding and the upper molding. In a case where the solid molding resin is disposed on the top surface of the semiconductor chip, the substrate is mounted on a lower mold and then the solid molding resin is heated and melts into liquid molding resin having flowability. An upper mold is mounted on the lower mold, and melted molding resin is filled in a space between the lower molding and the upper molding.
Abstract translation: 模制半导体封装的方法包括在设置在基板上的半导体芯片的顶表面上涂布液体模制树脂或将固体模塑树脂设置。 固体成型树脂可以包括粉末成型树脂或片状模塑树脂。 在半导体芯片的上表面上涂布有液态成型树脂的情况下,将基板安装在下模和上模之间,然后将熔融模制树脂填充在下模和上模之间的空间中。 在固体成形树脂设置在半导体芯片的顶面的情况下,将基板安装在下模上,然后将固体成型树脂加热熔融成具有流动性的液态成型树脂。 上模具安装在下模具上,熔融模塑树脂填充在下模和上模之间的空间中。
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公开(公告)号:US08956921B2
公开(公告)日:2015-02-17
申请号:US13836553
申请日:2013-03-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jun-young Ko , Jae-yong Park , Heui-seog Kim , Ho-geon Song
IPC: H01L21/16 , H01L21/56 , H01L25/065
CPC classification number: H01L21/52 , H01L21/56 , H01L21/565 , H01L25/0657 , H01L2224/16225 , H01L2224/48227 , H01L2225/06562
Abstract: A method of molding a semiconductor package includes coating liquid molding resin or disposing solid molding resin on a top surface of a semiconductor chip arranged on a substrate. The solid molding resin may include powdered molding resin or sheet-type molding resin. In a case where liquid molding resin is coated on the top surface of the semiconductor chip, the substrate is mounted between a lower molding and an upper molding, and then melted molding resin is filled in a space between the lower molding and the upper molding. In a case where the solid molding resin is disposed on the top surface of the semiconductor chip, the substrate is mounted on a lower mold and then the solid molding resin is heated and melts into liquid molding resin having flowability. An upper mold is mounted on the lower mold, and melted molding resin is filled in a space between the lower molding and the upper molding.
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公开(公告)号:US20130292846A1
公开(公告)日:2013-11-07
申请号:US13768649
申请日:2013-02-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Seok-hyun Lee , Sun-won Kang , Ho-geon Song
IPC: H01L23/538
CPC classification number: H01L23/538 , H01L21/568 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/5384 , H01L23/5389 , H01L24/19 , H01L24/96 , H01L25/03 , H01L25/105 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2225/1035 , H01L2225/1058 , H01L2924/12042 , H01L2924/181 , H01L2924/00
Abstract: Provided is a semiconductor package including a first semiconductor chip and a second semiconductor chip respectively disposed at a bottom and at a top so that active surfaces thereof face each other. Further includes is a first molding member for sealing the first semiconductor chip and exposing the active surface of the first semiconductor chip through a top surface, a first rewiring formed on the top surface of the first molding member and the active surface of the first semiconductor chip, a second rewiring formed on a bottom surface of the first molding member, a through-via for penetrating through the first molding member and electrically connecting the first and second rewirings, and a first connection member disposed between the first and second semiconductor chips. Also provided are various systems including same and various methods for making same.
Abstract translation: 提供了一种半导体封装,其包括分别设置在底部和顶部的第一半导体芯片和第二半导体芯片,使得其有效表面彼此面对。 还包括第一模制构件,用于密封第一半导体芯片并通过顶表面暴露第一半导体芯片的活性表面,第一重新布线形成在第一模制构件的顶表面上,第一半导体芯片的有源表面 ,形成在第一成型构件的底面上的第二重新布线,穿过第一成型构件并电连接第一和第二重新布置的通孔,以及设置在第一和第二半导体芯片之间的第一连接构件。 还提供了包括相同的各种系统和用于制造它们的各种方法。
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公开(公告)号:US20130203220A1
公开(公告)日:2013-08-08
申请号:US13836553
申请日:2013-03-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jun-young Ko , Jae-yong Park , Heui-seog Kim , Ho-geon Song
IPC: H01L21/56
CPC classification number: H01L21/52 , H01L21/56 , H01L21/565 , H01L25/0657 , H01L2224/16225 , H01L2224/48227 , H01L2225/06562
Abstract: A method of molding a semiconductor package includes coating liquid molding resin or disposing solid molding resin on a top surface of a semiconductor chip arranged on a substrate. The solid molding resin may include powdered molding resin or sheet-type molding resin. In a case where liquid molding resin is coated on the top surface of the semiconductor chip, the substrate is mounted between a lower molding and an upper molding, and then melted molding resin is filled in a space between the lower molding and the upper molding. In a case where the solid molding resin is disposed on the top surface of the semiconductor chip, the substrate is mounted on a lower mold and then the solid molding resin is heated and melts into liquid molding resin having flowability. An upper mold is mounted on the lower mold, and melted molding resin is filled in a space between the lower molding and the upper molding.
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