公开(公告)号：US10712955B2

公开(公告)日：2020-07-14

申请号：US16145772

申请日：2018-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Su-chang Jeon ,  Sang-won Park ,  Dong-kyo Shim ,  Dong-hun Kwak

IPC: G11C16/10 ,  G06F3/06 ,  G11C16/30 ,  G11C16/32

Abstract: A non-volatile memory device having a memory chip is provided. The memory chip having a memory cell array including a plurality of memory planes sharing a pad, the pad configured to communicate input and output signals. The memory chip also having a control circuit configured to monitor operations of the plurality of memory planes, and control an operation of at least one of the plurality of memory planes based on a result of the monitoring such that peak power intervals of the plurality of memory planes are at least partially distributed.

公开(公告)号：US20190114099A1

公开(公告)日：2019-04-18

申请号：US16145772

申请日：2018-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Su-chang JEON ,  Sang-won Park ,  Dong-kyo Shim ,  Dong-hun Kwak

IPC: G06F3/06

CPC classification number: G06F3/0625 ,  G06F3/0653 ,  G06F3/0688 ,  G11C16/30 ,  G11C16/32

Abstract: A non-volatile memory device having a memory chip is provided. The memory chip having a memory cell array including a plurality of memory planes sharing a pad, the pad configured to communicate input and output signals. The memory chip also having a control circuit configured to monitor operations of the plurality of memory planes, and control an operation of at least one of the plurality of memory planes based on a result of the monitoring such that peak power intervals of the plurality of memory planes are at least partially distributed.

公开(公告)号：US10692578B2

公开(公告)日：2020-06-23

申请号：US15955029

申请日：2018-04-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Su-chang Jeon ,  Kui-han Ko ,  Dong-hun Kwak ,  Jin-young Kim

IPC: G11C16/10 ,  G11C16/26 ,  G11C16/34 ,  G06F13/00 ,  G06F13/16 ,  G11C16/30 ,  G11C16/32 ,  G11C11/56 ,  H01L27/11582 ,  G11C16/04 ,  G11C7/10 ,  G11C5/14

Abstract: Provided is a method performed by a nonvolatile memory device, the method may include: initiating a first program operation corresponding to a first program loop among a plurality of program loops; receiving a suspend command for an urgent read operation during the first program operation; determining a recovery timing from either of a first timing contemporaneous with the receiving the suspend command, and a second timing after completion of the first program operation, based on the suspend command; and initiating a recovery at the determined recovery timing by applying a recovery voltage to a selected word line.

公开(公告)号：US20190057742A1

公开(公告)日：2019-02-21

申请号：US15955029

申请日：2018-04-17

Applicant: Samsung Electronics Co, Ltd

Inventor： Su-chang JEON ,  Kui-han Ko ,  Dong-hun Kwak ,  Jin-young Kim

IPC: G11C16/10 ,  G11C16/26 ,  G11C16/32 ,  G11C16/04 ,  H01L27/11582

Abstract: Provided is a method performed by a nonvolatile memory device, the method may include: initiating a first program operation corresponding to a first program loop among a plurality of program loops; receiving a suspend command for an urgent read operation during the first program operation; determining a recovery timing from either of a first timing contemporaneous with the receiving the suspend command, and a second timing after completion of the first program operation, based on the suspend command; and initiating a recovery at the determined recovery timing by applying a recovery voltage to a selected word line.