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    Semiconductor device and method of fabricating the same
    1.
    发明授权
    Semiconductor device and method of fabricating the same 有权

    公开(公告)号：US12302556B2

    公开(公告)日：2025-05-13

    申请号：US17747423

    申请日：2022-05-18

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dong-Wan Kim ,  Keonhee Park ,  Dong-Sik Park ,  Joonsuk Park ,  Jihoon Chang ,  Hyeon-Woo Jang

    IPC: H01L27/108 ,  H01L21/3213 ,  H10B12/00

    Abstract: Disclosed are semiconductor devices and their fabrication methods. The semiconductor device comprises a substrate including a peripheral block and cell blocks each including a cell center region, a cell edge region, and a cell middle region, and bit lines extending on each cell block in a first direction. The bit lines include center bit lines, middle bit lines, and edge bit lines. The bit line has first and second lateral surfaces opposite to each other in a second direction. The first lateral surface straightly extends along the first direction on the cell center region, the cell middle region, and the cell edge region. The second lateral surface straightly extends along the first direction on the cell center region and the cell edge region, and the second lateral surface extends along a third direction, that intersects the first direction and the second direction, on the cell middle region.

    SEMICONDUCTOR MEMORY DEVICE
    3.
    发明公开
    SEMICONDUCTOR MEMORY DEVICE 审中-公开

    公开(公告)号：US20240172424A1

    公开(公告)日：2024-05-23

    申请号：US18454206

    申请日：2023-08-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Deokhwan Choi ,  Julpin Park ,  In-Jae Bae ,  Dong-Sik Park

    IPC: H10B12/00

    CPC classification number: H10B12/482 ,  H10B12/315 ,  H10B12/488 ,  H10B12/50

    Abstract: A semiconductor memory device includes a bit line on a substrate and extending in a first direction, first and second active pillars on the bit line, the first active pillar including a first horizontal portion coupled to the bit line and a first vertical portion extending from the first horizontal portion, the second active pillar including a second horizontal portion coupled to the bit line and a second vertical portion extending from the second horizontal portion. First and second word lines are on the first and second horizontal portions of the first and second active pillars, respectively, and extend in a second direction crossing the first direction. A first insulating layer is between the first and second word lines. A first and second side surfaces of the first and second horizontal portions face each other. The first insulating layer includes an air gap between the first and second side surfaces.

    Semiconductor devices having through electrodes and methods for fabricating the same
    5.
    发明授权
    Semiconductor devices having through electrodes and methods for fabricating the same 有权

    公开(公告)号：US11469157B2

    公开(公告)日：2022-10-11

    申请号：US17152012

    申请日：2021-01-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dong-Wan Kim ,  Jung-Hoon Han ,  Dong-Sik Park

    IPC: H01L23/48 ,  H01L23/538 ,  H01L21/768

    Abstract: The semiconductor device includes a substrate including an integrated circuit and a contact that are electrically connected to each other, an insulation layer covering the substrate and including metal lines, and a through electrode electrically connected to the integrated circuit. The insulation layer includes an interlayer dielectric layer on the substrate and an intermetal dielectric layer on the interlayer dielectric layer. The metal lines include a first metal line in the interlayer dielectric layer and electrically connected to the contact, and a plurality of second metal lines in the intermetal dielectric layer and electrically connected to the first metal line and the through electrode. The through electrode includes a top surface higher than a top surface of the contact.

    Semiconductor devices having through electrodes and methods for fabricating the same
    6.
    发明授权
    Semiconductor devices having through electrodes and methods for fabricating the same 有权

    公开(公告)号：US10340204B2

    公开(公告)日：2019-07-02

    申请号：US15443259

    申请日：2017-02-27

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dong-Wan Kim ,  Jung-Hoon Han ,  Dong-Sik Park

    IPC: H01L23/48 ,  H01L23/538 ,  H01L21/768

    Abstract: The semiconductor device includes a substrate including an integrated circuit and a contact that are electrically connected to each other, an insulation layer covering the substrate and including metal lines, and a through electrode electrically connected to the integrated circuit. The insulation layer includes an interlayer dielectric layer on the substrate and an intermetal dielectric layer on the interlayer dielectric layer. The metal lines include a first metal line in the interlayer dielectric layer and electrically connected to the contact, and a plurality of second metal lines in the intermetal dielectric layer and electrically connected to the first metal line and the through electrode. The through electrode includes a top surface higher than a top surface of the contact.

    SEMICONDUCTOR DEVICES AND THE METHOD OF MANUFACTURING THE SAME
    8.
    发明申请
    SEMICONDUCTOR DEVICES AND THE METHOD OF MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20140015137A1

    公开(公告)日：2014-01-16

    申请号：US13908220

    申请日：2013-06-03

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Dong-Sik Park ,  Sungjin Kim ,  Seungmo Kang

    IPC: H01L23/532

    CPC classification number: H01L23/53257 ,  H01L21/7682 ,  H01L21/76858 ,  H01L21/76885 ,  H01L23/5222 ,  H01L23/5283 ,  H01L23/53223 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor device may include a first interlayer dielectric layer including a plurality of contacts, a plurality of interconnection patterns disposed on the first interlayer dielectric layer and connected to the contacts, respectively, and a second interlayer dielectric layer disposed on the first interlayer dielectric layer and covering the interconnection patterns. Each of the interconnection patterns may include a first metal pattern, a second metal pattern disposed on the first metal pattern, a first barrier pattern between the contact and the first metal pattern, and a second barrier pattern between the first metal pattern and the second metal pattern. The second metal pattern may expose a portion of a top surface of the second barrier pattern, and the second interlayer dielectric layer may include an air gap between the interconnection patterns adjacent to each other.

    Abstract translation: 半导体器件可以包括：第一层间介质层，包括多个触点;多个互连图案，分别设置在第一层间电介质层上并分别连接到触点;以及第二层间介质层，设置在第一层间介质层上， 涵盖互连模式。 每个互连图案可以包括第一金属图案，设置在第一金属图案上的第二金属图案，接触件和第一金属图案之间的第一阻挡图案，以及第一金属图案和第二金属图案之间的第二阻挡图案 模式。 第二金属图案可以暴露第二阻挡图案的顶表面的一部分，并且第二层间电介质层可以包括彼此相邻的互连图案之间的气隙。

    SEMICONDUCTOR DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20230045674A1

    公开(公告)日：2023-02-09

    申请号：US17662306

    申请日：2022-05-06

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyeon-Woo Jang ,  Dong-Wan Kim ,  Keonhee Park ,  Dong-Sik Park ,  Joonsuk Park ,  Jihoon Chang

    IPC: H01L27/108

    Abstract: A semiconductor device may include a substrate including a cell region and a peripheral region, a gate stack on the peripheral region, an interlayer insulating layer on the gate stack, peripheral circuit interconnection lines on the interlayer insulating layer, and an interconnection insulating pattern between the peripheral circuit interconnection lines. The interconnection insulating pattern may include a pair of vertical portions spaced apart from each other in a first direction parallel to a top surface of the substrate and a connecting portion connecting the vertical portions to each other. Each of the vertical portions of the interconnection insulating pattern may have a first thickness at a same level as top surfaces of the peripheral circuit interconnection lines and a second thickness at a same level as bottom surfaces of the peripheral circuit interconnection lines. The first thickness may be substantially equal to the second thickness.

    Semiconductor devices having through electrodes and methods for fabricating the same
    10.
    发明授权
    Semiconductor devices having through electrodes and methods for fabricating the same 有权

    公开(公告)号：US10950523B2

    公开(公告)日：2021-03-16

    申请号：US16426612

    申请日：2019-05-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dong-Wan Kim ,  Jung-Hoon Han ,  Dong-Sik Park

    IPC: H01L23/48 ,  H01L23/538 ,  H01L21/768

    Abstract: The semiconductor device includes a substrate including an integrated circuit and a contact that are electrically connected to each other, an insulation layer covering the substrate and including metal lines, and a through electrode electrically connected to the integrated circuit. The insulation layer includes an interlayer dielectric layer on the substrate and an intermetal dielectric layer on the interlayer dielectric layer. The metal lines include a first metal line in the interlayer dielectric layer and electrically connected to the contact, and a plurality of second metal lines in the intermetal dielectric layer and electrically connected to the first metal line and the through electrode. The through electrode includes a top surface higher than a top surface of the contact.

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