DISPLAY APPARATUS
    2.
    发明公开
    DISPLAY APPARATUS 审中-公开

    公开(公告)号:US20240090259A1

    公开(公告)日:2024-03-14

    申请号:US18122376

    申请日:2023-03-16

    CPC classification number: H10K59/1213 H10K59/131 H10K2102/311

    Abstract: A display apparatus includes: a substrate including pixel circuit areas, line areas arranged between the pixel circuit areas, and non-line areas which are arranged between the line areas and in which no line is arranged; a pixel circuit arranged in the pixel circuit areas and including at least one thin film transistor; a plurality of lines arranged in the pixel circuit areas and the line areas; and a display element including a pixel electrode connected to the pixel circuit, where in a plan view an area of the pixel electrode is greater than an area in which the pixel circuit is arranged.

    DISPLAY APPARATUS
    3.
    发明公开
    DISPLAY APPARATUS 审中-公开

    公开(公告)号:US20240040875A1

    公开(公告)日:2024-02-01

    申请号:US18109420

    申请日:2023-02-14

    CPC classification number: H10K59/1315 H10K77/111

    Abstract: A display apparatus includes a substrate including a plurality of pixel circuit areas and a plurality of wiring areas, each of the wiring areas being arranged between corresponding adjacent pixel circuit areas of the plurality of pixel circuit areas, a pixel circuit arranged in each of the plurality of pixel circuit areas and including at least one thin film transistor, a plurality of wirings arranged in the pixel circuit areas and the wiring areas, and a display element connected to the pixel circuit. The first width of the wirings arranged in the wiring areas is greater than the second width of the wirings arranged in the pixel circuit areas.

    ARRAY SUBSTRATE
    8.
    发明申请
    ARRAY SUBSTRATE 有权
    阵列基板

    公开(公告)号:US20170047347A1

    公开(公告)日:2017-02-16

    申请号:US15054884

    申请日:2016-02-26

    CPC classification number: H01L27/124 G02F1/1345 G02F1/136259 H01L27/1248

    Abstract: An array substrate and a display apparatus including the array substrate. The array substrate includes: a plurality of signal lines aligned in a display area of the array substrate; a plurality of signal pads aligned in a non-display area of the array substrate; a plurality of fan-out lines aligned in the non-display area and respectively connected to the signal lines and the signal pads; a plurality of auxiliary lines respectively overlapping and insulated from the fan-out lines; and a plurality of connection lines connecting in parallel at least two of the auxiliary lines that are adjacent to each other.

    Abstract translation: 阵列基板和包括阵列基板的显示装置。 阵列基板包括:在阵列基板的显示区域中排列的多条信号线; 在阵列基板的非显示区域中排列的多个信号焊盘; 在非显示区域中排列并分别连接到信号线和信号垫的多个扇出线; 分别与扇出线重叠并绝缘的多条辅助线; 以及并联连接彼此相邻的至少两条辅助线的多条连接线。

    DISPLAY PANEL AND METHOD OF REPAIRING THE SAME

    公开(公告)号:US20200249535A1

    公开(公告)日:2020-08-06

    申请号:US16853674

    申请日:2020-04-20

    Abstract: A display panel includes gate lines, data lines, switching elements connected to the gate lines and the data lines, pixel electrodes connected to the switching elements and markers. The pixel electrode includes first, second third and fourth areas which are divided by a horizontal central line and a vertical central line. The first, second, third and fourth areas correspond to an upper-left portion, an upper-right portion, a lower-left portion and a lower-right portion of a central point of the pixel electrode. When the pixel electrode is disposed between first and second data lines and connected to the first data line, the marker is disposed in one of the first and third areas. When the pixel electrode is disposed between the first and second data lines and connected to the second data line, the marker is disposed in one of the second and fourth areas.

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