公开(公告)号：US20150357356A1

公开(公告)日：2015-12-10

申请号：US14621303

申请日：2015-02-12

Applicant: Samsung Display Co., Ltd.

Inventor： Jae-Neung KIM ,  Yu-Gwang JEONG ,  Su-Bin BAE ,  Yun-Jong YEO

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/1288 ,  H01L27/1214 ,  H01L27/1225 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78669 ,  H01L29/7869

Abstract: A thin film transistor array substrate and a method of manufacturing the thin film transistor array substrate are provided. The thin film transistor array substrate includes: a substrate; a gate electrode disposed on the substrate; a gate insulating layer disposed on the gate electrode; a semiconductor pattern disposed on the gate insulating layer; a source electrode and a drain electrode disposed on the semiconductor pattern and spaced apart from each other; and a hard mask pattern disposed on the source electrode and the drain electrode.

Abstract translation: 提供薄膜晶体管阵列基板和制造薄膜晶体管阵列基板的方法。 薄膜晶体管阵列基板包括：基板; 设置在所述基板上的栅电极; 设置在栅电极上的栅极绝缘层; 设置在所述栅绝缘层上的半导体图案; 源电极和漏电极，设置在半导体图案上并彼此间隔开; 以及设置在源电极和漏电极上的硬掩模图案。

公开(公告)号：US20200006503A1

公开(公告)日：2020-01-02

申请号：US16563948

申请日：2019-09-09

Applicant: Samsung Display Co., Ltd.

Inventor： Yu-Gwang JEONG ,  Shin-Il CHOI ,  Su-Bin BAE ,  Sung-Hoon YANG

IPC: H01L29/417

Abstract: According to an exemplary embodiment, a display substrate includes a gate metal pattern comprising a gate electrode, an active pattern disposed on the gate pattern and a source metal pattern disposed on the active pattern. The source metal pattern includes a first lower pattern disposed on the active pattern, a second lower pattern disposed on the first lower pattern, a low-resistance metal pattern disposed on the second lower pattern, and an upper pattern disposed on the low-resistance metal pattern. The first lower pattern, the second lower pattern, and the upper pattern each include a material that is the same.

公开(公告)号：US20160266295A1

公开(公告)日：2016-09-15

申请号：US14846471

申请日：2015-09-04

Applicant: Samsung Display Co., Ltd.

Inventor： Sung-Won CHO ,  Jung-Ha SON ,  Su-Bin BAE ,  Yun-Jong YEO ,  Joo-Hyung LEE

IPC: G02B5/30 ,  G02F1/1335

CPC classification number: G02B5/3058 ,  B81C1/00388 ,  B81C1/00404 ,  B81C2201/0149 ,  C09K13/00 ,  C23F4/00 ,  G02F2001/133548 ,  G03F7/0041 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/3088 ,  H01L21/31056 ,  H01L21/31111 ,  H01L21/31116

Abstract: A method of manufacturing a polarizer includes forming a first layer on a base substrate, forming a first partition wall layer on the first layer, forming a second partition wall layer on the first partition wall, forming a plurality of first partition wall patterns and a plurality of second partition walls disposed on the first partition wall patterns by etching the first partition wall and the second partition wall at the same time, forming a block copolymer layer on the first layer on which the plurality of first partition wall patterns are formed, forming a plurality of fine patterns from the block copolymer layer, and patterning the first layer using the fine patterns and the second partition wall patterns as a mask.

Abstract translation: 偏振片的制造方法包括在基底基板上形成第一层，在第一层上形成第一分隔壁层，在第一分隔壁上形成第二分隔壁层，形成多个第一隔壁图案和多个第一分隔壁图案 通过同时蚀刻第一分隔壁和第二分隔壁而在第一分隔壁图案上设置的第二分隔壁，在形成有多个第一分隔壁图案的第一层上形成嵌段共聚物层，形成 从嵌段共聚物层形成多个精细图案，并使用精细图案和第二分隔壁图案作为掩模对第一层图案化。

公开(公告)号：US20150053989A1

公开(公告)日：2015-02-26

申请号：US14455113

申请日：2014-08-08

Applicant: Samsung Display Co., Ltd.

Inventor： Yu-Gwang JEONG ,  Shin-Il CHOI ,  Su-Bin BAE ,  Dae-Ho KIM ,  Sang-Gab KIM ,  Jae-Neung KIM

IPC: H01L27/12 ,  H01L21/02 ,  H01L21/3065

CPC classification number: H01L27/124 ,  H01L21/31116 ,  H01L21/76804 ,  H01L21/76832 ,  H01L27/1259

Abstract: A display substrate includes a base substrate, a common line on the base substrate, a first insulation layer covering the common line and having a first insulating material, a conductive pattern on the first insulation layer and including a source electrode and a drain electrode, a second insulation layer covering the drain electrode and the common line, and including a lower second insulation layer having a second insulating material and an upper second insulation layer having the first insulating material, a first electrode electrically connected to the drain electrode through a first contact hole in the second insulation layer, and a second electrode electrically connected to the common line through a second contact hole in the first and second insulation layers. The upper and lower second insulation layers on the drain electrode have a first hole and a second hole respectively that form the first contact hole.

Abstract translation: 显示基板包括基底基板，基底基板上的公共线，覆盖公共线的第一绝缘层，并具有第一绝缘材料，第一绝缘层上的导电图案，包括源电极和漏电极， 覆盖漏电极和公共线的第二绝缘层，并且包括具有第二绝缘材料的下第二绝缘层和具有第一绝缘材料的上第二绝缘层，第一电极，通过第一接触孔电连接到漏电极 以及通过第一绝缘层和第二绝缘层中的第二接触孔与公共线电连接的第二电极。 漏电极上的上，下第二绝缘层分别具有形成第一接触孔的第一孔和第二孔。

公开(公告)号：US20160043105A1

公开(公告)日：2016-02-11

申请号：US14606986

申请日：2015-01-27

Applicant: Samsung Display Co., LTD.

Inventor： Yu-Gwang JEONG ,  Shin-Il CHOI ,  Su-Bin BAE ,  Sung-Hoon YANG

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786 ,  H01L23/532 ,  H01L23/528

CPC classification number: H01L29/41733 ,  H01L23/53214 ,  H01L23/53257 ,  H01L29/458 ,  H01L29/66765 ,  H01L2924/0002 ,  H01L2924/00

Abstract: According to an exemplary embodiment, a display substrate includes a gate metal pattern comprising a gate electrode, an active pattern disposed on the gate pattern and a source metal pattern disposed on the active pattern. The source metal pattern includes a first lower pattern disposed on the active pattern, a second lower pattern disposed on the first lower pattern, a low-resistance metal pattern disposed on the second lower pattern, and an upper pattern disposed on the low-resistance metal pattern. The first lower pattern, the second lower pattern, and the upper pattern each include a material that is the same.

Abstract translation: 根据示例性实施例，显示基板包括栅极金属图案，栅极金属图案包括栅电极，设置在栅极图案上的有源图案和设置在有源图案上的源极金属图案。 源极金属图案包括设置在有源图案上的第一下部图案，设置在第一下部图案上的第二下部图案，设置在第二下部图案上的低电阻金属图案，以及设置在低电阻金属上的上部图案 模式。 第一下图案，第二下图案和上图案均包括相同的材料。

公开(公告)号：US20160035765A1

公开(公告)日：2016-02-04

申请号：US14706858

申请日：2015-05-07

Applicant: Samsung Display Co., Ltd.

Inventor： Seung-Ho YOON ,  Su-Bin BAE ,  Yu-Gwang JEONG

IPC: H01L27/12

CPC classification number: H01L27/1288 ,  H01L27/124 ,  H01L29/4908

Abstract: A method of fabricating metal wiring, including: sequentially forming first and second conductive layers on a substrate; forming a first photosensitive film pattern on the first and second conductive layers; forming first and second conductive patterns by etching parts of the first and second conductive layers by using the first photosensitive film pattern as a mask; forming a second photosensitive film pattern positioned inside the first photosensitive film pattern by a predetermined interval by ashing the first photosensitive film pattern; etching an exposed first conductive pattern by using the second photosensitive film pattern as a mask; and removing the second photosensitive film pattern.

Abstract translation: 一种制造金属布线的方法，包括：在基板上依次形成第一和第二导电层; 在所述第一和第二导电层上形成第一感光膜图案; 通过使用第一感光膜图案作为掩模来蚀刻第一和第二导电层的部分来形成第一和第二导电图案; 通过灰化所述第一感光膜图案形成位于所述第一感光膜图案内的预定间隔的第二感光膜图案; 通过使用第二感光膜图案作为掩模蚀刻暴露的第一导电图案; 并去除第二感光膜图案。