公开(公告)号：US10896920B2

公开(公告)日：2021-01-19

申请号：US16438385

申请日：2019-06-11

Applicant: Samsung Display Co., Ltd.

Inventor： Young-Wook Lee ,  Woo-Geun Lee ,  Ki-Won Kim ,  Hyun-Jung Lee ,  Ji-Soo Oh

IPC: H01L27/12 ,  H01L29/786 ,  H01L21/768

Abstract: A substrate including a gate line and a gate electrode disposed on a substrate, an oxide semiconductor layer pattern overlapping the gate electrode, a gate insulating layer disposed between the gate electrode and the oxide semiconductor layer pattern, a data line intersecting the gate line, a source electrode electrically connected to the oxide semiconductor layer pattern, a drain electrode electrically connected to the oxide semiconductor layer, the drain electrode spaced apart from the source electrode, and an insulating pattern including a first portion, which is disposed between the gate line and the data line and at least partially overlaps with both of the gate line and the data line.

公开(公告)号：US10439067B2

公开(公告)日：2019-10-08

申请号：US14858281

申请日：2015-09-18

Applicant: Samsung Display Co., Ltd.

Inventor： Ki-Won Kim ,  Kap-Soo Yoon ,  Do-Hyun Kim ,  Hyun-Jung Lee

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/24 ,  H01L21/02 ,  H01L27/32 ,  H01L29/66

Abstract: A display substrate is provided. The display substrate includes a gate interconnection disposed on an insulating substrate, an oxide semiconductor pattern disposed on the gate interconnection and including an oxide semiconductor, and a data interconnection disposed on the oxide semiconductor pattern to interconnect the gate interconnection. The oxide semiconductor pattern includes a first oxide semiconductor pattern having a first oxide and a first element and a second oxide semiconductor pattern having a second oxide.

公开(公告)号：US09825065B2

公开(公告)日：2017-11-21

申请号：US15342756

申请日：2016-11-03

Applicant: Samsung Display Co., Ltd.

Inventor： Young-Wook Lee ,  Woo-Geun Lee ,  Ki-Won Kim ,  Hyun-Jung Lee ,  Ji-Soo Oh

IPC: H01L27/12 ,  H01L29/786 ,  H01L21/768

CPC classification number: H01L27/124 ,  H01L21/76834 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/1262 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/7869 ,  H01L29/78693

Abstract: A substrate including gate wirings including gate line and a gate electrode disposed on the substrate, a storage line disposed on the same layer as the gate wirings, a gate insulating layer disposed on the gate wirings and the storage line, an oxide semiconductor layer pattern disposed on the gate insulating layer, data wirings including a data line crossing the gate line, a source electrode disposed on one side of the oxide semiconductor layer pattern, and a drain electrode disposed on another side of the oxide semiconductor layer, and an etch stopper including a first etch stopper portion disposed between the storage line and the data line and partially overlapping both the data line and the storage line.

公开(公告)号：US09123597B2

公开(公告)日：2015-09-01

申请号：US14319012

申请日：2014-06-30

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Je-Hun Lee ,  Ki-Won Kim ,  Do-Hyun Kim ,  Woo-Geun Lee ,  Kap-Soo Yoon

IPC: H01L51/40 ,  H01L27/12 ,  H01L29/49 ,  H01L29/786 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L27/1225 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02554 ,  H01L21/02565 ,  H01L23/53238 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1262 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.

Abstract translation: TFT阵列基板包括设置在绝缘基板上并包括沟道部分的半导体氧化物层，与半导体氧化物层重叠的栅极电极，插入在半导体氧化物层和栅电极之间的栅极绝缘层，以及设置在 半导体氧化物层和栅电极。 栅极绝缘层和钝化层中的至少一个包括氧氮化物层，并且氧氮化物层在氧氮化物层的位置更靠近半导体氧化物层的位置处具有比氮的浓度高的氧氮化物层。

公开(公告)号：US09111805B2

公开(公告)日：2015-08-18

申请号：US14230787

申请日：2014-03-31

Applicant: Samsung Display Co., Ltd.

Inventor： Pil-Sang Yun ,  Ki-Won Kim ,  Hye-Young Ryu ,  Woo-Geun Lee ,  Seung-Ha Choi ,  Jae-Hyoung Youn ,  Kyoung-Jae Chung ,  Young-Wook Lee ,  Je-Hun Lee ,  Kap-Soo Yoon ,  Do-Hyun Kim ,  Dong-Ju Yang ,  Young-Joo Choi

IPC: H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/41733 ,  H01L21/44 ,  H01L21/441 ,  H01L21/465 ,  H01L21/475 ,  H01L21/47573 ,  H01L21/47635 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.

Abstract translation: 薄膜晶体管面板包括绝缘基板，设置在绝缘基板上的栅极绝缘层，设置在栅极绝缘层上的氧化物半导体层，设置在氧化物半导体层上的蚀刻停止器，以及设置在源极电极和漏极上的 在蚀刻停止器上。

公开(公告)号：US09105733B2

公开(公告)日：2015-08-11

申请号：US13897879

申请日：2013-05-20

Applicant: Samsung Display Co., Ltd.

Inventor： Young-Wook Lee ,  Woo-Geun Lee ,  Ki-Won Kim ,  Hyun-Jung Lee ,  Ji-Soo Oh

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L27/124 ,  H01L21/76834 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/1262 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/7869 ,  H01L29/78693

Abstract: A thin film transistor (TFT) array substrate and a manufacturing method thereof are provided. The TFT array substrate may include a gate line disposed on a substrate and including a gate line and a gate electrode, an oxide semiconductor layer pattern disposed on the gate electrode, a data line disposed on the oxide semiconductor layer pattern and including a source electrode and a drain electrode of a thin film transistor (TFT) together with the gate electrode, and a data line extending in a direction intersecting the gate line, and etch stop patterns disposed at an area where the TFT is formed between the source/drain electrodes and the oxide semiconductor layer pattern and at an area where the gate line and the data line overlap each other between the gate line and the data line.

Abstract translation: 提供薄膜晶体管（TFT）阵列基板及其制造方法。 TFT阵列基板可以包括设置在基板上的栅极线，包括栅极线和栅电极，设置在栅电极上的氧化物半导体层图案，设置在氧化物半导体层图案上的数据线，并且包括源电极和 薄膜晶体管（TFT）的漏电极和栅极电极以及沿着与栅极线相交的方向延伸的数据线，以及设置在源极/漏极之间形成TFT的区域的蚀刻停止图案，以及 氧化物半导体层图案和栅极线与数据线在栅极线与数据线之间重叠的区域。

公开(公告)号：US09954006B2

公开(公告)日：2018-04-24

申请号：US15332079

申请日：2016-10-24

Applicant: Samsung Display Co., Ltd.

Inventor： Je-Hun Lee ,  Ki-Won Kim ,  Do-Hyun Kim ,  Woo-Geun Lee ,  Kap-Soo Yoon

IPC: H01L29/10 ,  H01L27/12 ,  H01L29/51 ,  H01L29/786 ,  H01L29/45 ,  H01L23/532 ,  H01L29/49 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L27/1225 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02554 ,  H01L21/02565 ,  H01L23/53238 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1262 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.

公开(公告)号：US09520412B2

公开(公告)日：2016-12-13

申请号：US14798123

申请日：2015-07-13

Applicant: Samsung Display Co., Ltd.

Inventor： Pil-Sang Yun ,  Ki-Won Kim ,  Hye-Young Ryu ,  Woo-Geun Lee ,  Seung-Ha Choi ,  Jae-Hyoung Youn ,  Kyoung-Jae Chung ,  Young-Wook Lee ,  Je-Hun Lee ,  Kap-Soo Yoon ,  Do-Hyun Kim ,  Dong-Ju Yang ,  Young-Joo Choi

IPC: H01L21/00 ,  H01L21/84 ,  H01L27/12 ,  H01L21/4757 ,  H01L21/441 ,  H01L21/475 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/41733 ,  H01L21/44 ,  H01L21/441 ,  H01L21/465 ,  H01L21/475 ,  H01L21/47573 ,  H01L21/47635 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.

公开(公告)号：US20130234124A1

公开(公告)日：2013-09-12

申请号：US13871368

申请日：2013-04-26

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： KAP-SOO YOON ,  Woo-Geun Lee ,  Bong-Kyun Kim ,  Sung-Hoon Yang ,  Ki-Won Kim ,  Hyun-Jung Lee

IPC: H01L29/786 ,  H01L51/52

CPC classification number: H01L29/78693 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1288 ,  H01L27/3248 ,  H01L27/3262 ,  H01L51/5203

Abstract: Provided are a thin-film transistor (TFT) substrate, a method of manufacturing the same, and a display device including the same. The TFT substrate includes a gate electrode formed on a substrate, a gate insulating layer formed on the gate electrode, an oxide semiconductor pattern formed on the gate insulating layer, a source electrode formed on the oxide semiconductor pattern, a drain electrode formed on the oxide semiconductor pattern to face the source electrode, and a pixel electrode formed on the gate insulating layer.

Abstract translation: 提供了一种薄膜晶体管（TFT）基板，其制造方法和包括该薄膜晶体管的显示装置。 TFT基板包括形成在基板上的栅电极，形成在栅电极上的栅极绝缘层，形成在栅极绝缘层上的氧化物半导体图案，形成在氧化物半导体图案上的源电极，形成在氧化物上的漏电极 面对源电极的半导体图案，以及形成在栅极绝缘层上的像素电极。

公开(公告)号：US10796972B2

公开(公告)日：2020-10-06

申请号：US15964544

申请日：2018-04-27

Applicant: Samsung Display Co., Ltd.

Inventor： Ji-Yun Hong ,  Joon-Geol Kim ,  Jin-Won Lee ,  Ki-Won Kim

IPC: H01L21/66 ,  H01L27/12 ,  G09G3/00

Abstract: A display panel includes first and second test lines connected to the each of data lines, extending in the second direction, and arranged in the first direction, a first test pad electrically connected to the first test line, the first test pad and the first test line being formed from a same layer, and a second test pad electrically connected to the second test line through a contact hole formed through a first insulation layer and disposed adjacent to the first test pad in the second direction.