公开(公告)号：US20190123123A1

公开(公告)日：2019-04-25

申请号：US16041968

申请日：2018-07-23

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jong Oh SEO ,  Byung Soo SO ,  Dong-Min LEE ,  Dong-Sung LEE

IPC: H01L27/32 ,  H01L51/56 ,  H01L51/52 ,  G09G3/3266 ,  G09G3/3291

CPC classification number: H01L27/3276 ,  G09G3/3233 ,  G09G3/3266 ,  G09G3/3291 ,  G09G2300/0842 ,  G09G2310/0251 ,  G09G2310/0262 ,  H01L27/12 ,  H01L27/3246 ,  H01L27/3258 ,  H01L27/3262 ,  H01L51/5203 ,  H01L51/5237 ,  H01L51/56

Abstract: An organic light emitting diode display includes a substrate, a scan line on the substrate to transfer a scan signal, a data line on the substrate to transfer a data signal, a switching transistor connected with the scan line and the data line, a driving transistor connected with the switching transistor, and an organic light emitting diode electrically connected to the driving transistor. The driving transistor may include a first semiconductor layer, the switching transistor may include a second semiconductor layer, and the first semiconductor layer may have a surface roughness that is greater than that of the second semiconductor layer.

公开(公告)号：US20210359057A1

公开(公告)日：2021-11-18

申请号：US17192424

申请日：2021-03-04

Applicant: Samsung Display Co., LTD.

Inventor： Jong Oh SEO ,  Byung Soo SO

IPC: H01L27/32 ,  H01L51/56

Abstract: A display device and a method of manufacturing a display device are provided. A display device includes a lower conductive pattern disposed on a substrate, a lower insulating layer disposed on the lower conductive pattern, the lower insulating layer including a first lower insulating pattern including an overlapping region overlapping the lower conductive pattern, and a protruding region. The display device includes a semiconductor pattern disposed on the first lower insulating pattern and having a side surface, the side surface being aligned with a side surface of the first lower insulating pattern or disposed inward from the side surface of the first lower insulating pattern, a gate insulating layer disposed on the semiconductor pattern, a gate electrode disposed on the gate insulating layer, and an empty space disposed between the substrate and the protruding region of the first lower insulating pattern.

公开(公告)号：US20240268151A1

公开(公告)日：2024-08-08

申请号：US18515270

申请日：2023-11-21

Applicant: Samsung Display Co., LTD.

Inventor： Jong Oh SEO ,  Jong Jun BAEK

IPC: H10K59/121 ,  H10K59/12

CPC classification number: H10K59/1213 ,  H10K59/1201

Abstract: A display device includes a light-emitting device; a first transistor that outputs a driving current applied to the light-emitting device; a second transistor that transmits a data voltage to a first electrode of the first transistor; and a third transistor electrically connected to a second electrode and a gate electrode of the first transistor, a first semiconductor layer of the first transistor includes fluorine ions, a third semiconductor layer of the third transistor includes a third lower doping layer and a third upper doping layer sequentially disposed, a concentration of phosphorus ions of the third lower doping layer is greater than a concentration of phosphorus ions of the third upper doping layer, and a concentration of boron ions of the third upper doping layer is greater than a concentration of boron ions of the third lower doping layer.

公开(公告)号：US20220077261A1

公开(公告)日：2022-03-10

申请号：US17338738

申请日：2021-06-04

Applicant: Samsung Display Co., Ltd.

Inventor： Jong Oh SEO ,  Jong Jun BAEK

IPC: H01L27/32 ,  H01L51/56

Abstract: An embodiment provides a manufacturing method of a polycrystalline silicon layer, including: forming a first amorphous silicon layer on a substrate; doping an N-type impurity into the first amorphous silicon layer; forming a second amorphous silicon layer on the n-doped first amorphous silicon layer; doping a P-type impurity into the second amorphous silicon layer; and crystalizing the n-doped first amorphous silicon layer and the p-doped second amorphous silicon layer by irradiating a laser beam onto n-doped first amorphous silicon layer and the p-doped second amorphous silicon layer to form a polycrystalline silicon layer.

公开(公告)号：US20190103495A1

公开(公告)日：2019-04-04

申请号：US15948097

申请日：2018-04-09

Applicant: Samsung Display Co., Ltd.

Inventor： Jong Oh SEO ,  Byung Soo SO ,  Dong-Min LEE ,  Dong-Sung LEE

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L29/78672 ,  H01L21/02532 ,  H01L21/02675 ,  H01L21/02686 ,  H01L21/02691 ,  H01L27/1218 ,  H01L27/1281 ,  H01L29/6675

Abstract: A manufacturing method of a polysilicon layer of a thin film transistor of a display device, includes: irradiating a first excimer laser beam having a first energy density to an amorphous silicon layer including an oxidation layer thereon, to form a first polysilicon layer including thereon portions of the oxidation layer at grain boundaries of the first polysilicon layer; removing the portions of the oxidation layer at the grain boundaries of the first polysilicon layer; and irradiating a second excimer laser beam having a second energy density of 80% to 100% of the first energy density to the first polysilicon layer from which the portions of the oxidation layer at the grain boundaries thereof are removed, to form a second polysilicon layer as the polysilicon layer of the thin film transistor.

公开(公告)号：US20240057377A1

公开(公告)日：2024-02-15

申请号：US18232226

申请日：2023-08-09

Applicant: Samsung Display Co., Ltd.

Inventor： Hiroshi OKUMURA ,  Jong Oh SEO

IPC: H10K59/12 ,  H10K59/121 ,  H10K71/40

CPC classification number: H10K59/1201 ,  H10K59/1213 ,  H10K71/40

Abstract: Provides is a manufacturing method of a display device including steps of forming a semiconductor on a substrate; applying a doping solution to the semiconductor layer; and doping by heat treating the semiconductor layer to which the doping solution is applied, wherein the doping solution includes a solvent and a dopant, and the dopant contains at least one of triethyl borate, tris(trimethylsilyl)borate, and trimethylboroxine.

公开(公告)号：US20240008319A1

公开(公告)日：2024-01-04

申请号：US18117023

申请日：2023-03-03

Applicant: Samsung Display Co., LTD.

Inventor： Jong Oh SEO ,  Dong-Min LEE

IPC: H10K59/124 ,  H10K77/10 ,  H10K59/12 ,  H10K71/80 ,  H01L29/417 ,  H01L29/423 ,  H01L29/786 ,  H01L29/66

CPC classification number: H10K59/124 ,  H10K77/111 ,  H10K59/1201 ,  H10K71/80 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/78696 ,  H01L29/66742

Abstract: A display device includes a substrate including an opening, a buffer layer disposed on the substrate, a semiconductor disposed on the buffer layer, a gate electrode overlapping at least a portion of the semiconductor in a plan view, a source electrode and a drain electrode electrically connected to the semiconductor, and a light-emitting device electrically connected to the drain electrode. The opening of the substrate overlaps another portion of the semiconductor in a plan view.

公开(公告)号：US20230132252A1

公开(公告)日：2023-04-27

申请号：US17689019

申请日：2022-03-08

Applicant: Samsung Display Co., Ltd.

Inventor： Jong Oh SEO ,  Hiroshi OKUMURA ,  Jae Woo JEONG

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66

Abstract: A transistor substrate includes a substrate, a semiconductor layer overlapping the substrate, and a gate electrode overlapping the semiconductor layer. The semiconductor layer includes a channel unit, a conductive unit directly connected to an end of the channel unit, and an edge unit positioned at an edge of the conductive unit. A carbon concentration of the edge unit is higher than each of a carbon concentration of the channel unit and a carbon concentration of the conductive unit.

公开(公告)号：US20220190142A1

公开(公告)日：2022-06-16

申请号：US17550230

申请日：2021-12-14

Applicant: Samsung Display Co., Ltd.

Inventor： JAEWOO JEONG ,  Jong Oh SEO

IPC: H01L29/66 ,  H01L29/786 ,  H01L21/265 ,  H01L21/266

Abstract: A method of manufacturing transistor may include forming an active layer on a base substrate, forming a sacrificial layer on the active layer, doping a first dopant ion in the active layer through a first ion implantation process, removing the sacrificial layer, forming a gate insulating layer; and forming a gate electrode on the gate insulating layer.