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    Display device having a groove in a blocking region and an auxiliary pattern overlapping the groove
    2.
    发明授权
    Display device having a groove in a blocking region and an auxiliary pattern overlapping the groove 有权

    公开(公告)号：US11011590B2

    公开(公告)日：2021-05-18

    申请号：US16230344

    申请日：2018-12-21

    Applicant: SAMSUNG DISPLAY CO., LTD.

    Inventor： Ki Hoon Kim ,  Deuk Jong Kim ,  Jae Hak Lee

    IPC: H01L27/32 ,  H01L51/52 ,  G09G3/3275 ,  H01L27/12 ,  H01L51/56 ,  H01L51/00

    Abstract: A display device includes a substrate including a display area and a non-display area adjacent to the display area. The non-display area includes a blocking region. An organic layer is disposed on the substrate. An emission layer is disposed in the display area of the substrate. An auxiliary pattern is disposed in the blocking region of the non-display area of the substrate. A thin film encapsulation layer is disposed on the substrate and overlaps the emission layer and the blocking region. The organic layer has a groove penetrating an entire thickness of the organic layer in the blocking region. The auxiliary pattern overlaps the groove. The auxiliary pattern includes a same material as a gate electrode disposed in the display area of the substrate.

    DISPLAY DEVICE HAVING A GROOVE IN A BLOCKING REGION
    3.
    发明申请
    DISPLAY DEVICE HAVING A GROOVE IN A BLOCKING REGION 审中-公开

    公开(公告)号：US20190229164A1

    公开(公告)日：2019-07-25

    申请号：US16230344

    申请日：2018-12-21

    Applicant: SAMSUNG DISPLAY CO., LTD.

    Inventor： Ki Hoon Kim ,  Deuk Jong Kim ,  Jae Hak Lee

    IPC: H01L27/32 ,  H01L51/52 ,  G09G3/3275

    Abstract: A display device includes a substrate including a display area and a non-display area adjacent to the display area. The non-display area includes a blocking region. An organic layer is disposed on the substrate. An emission layer is disposed in the display area of the substrate. An auxiliary pattern is disposed in the blocking region of the non-display area of the substrate. A thin film encapsulation layer is disposed on the substrate and overlaps the emission layer and the blocking region. The organic layer has a groove penetrating an entire thickness of the organic layer in the blocking region. The auxiliary pattern overlaps the groove. The auxiliary pattern includes a same material as a gate electrode disposed in the display area of the substrate.

    Thin film transistor array panel and manufacturing method thereof
    4.
    发明授权
    Thin film transistor array panel and manufacturing method thereof 有权

    公开(公告)号：US09837447B2

    公开(公告)日：2017-12-05

    申请号：US14281182

    申请日：2014-05-19

    Applicant: Samsung Display Co, Ltd.

    Inventor： Seung Hyun Park ,  Jun Ho Song ,  Jean Ho Song ,  Jae Hak Lee

    IPC: G02F1/1333 ,  H01L27/12 ,  G02F1/1343 ,  G02F1/1362

    CPC classification number: H01L27/1244 ,  G02F1/134363 ,  G02F1/136227 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1259

    Abstract: A thin film transistor array panel according to an exemplary embodiment of the invention includes: an insulating substrate; a gate line disposed on the insulating substrate and including a gate pad portion; a data line insulated from and crossing the gate line, and including a source electrode and a data pad portion; a drain electrode facing the source electrode; an organic insulating layer disposed on the data line and the drain electrode, and including a first contact hole; a common electrode disposed on the organic insulating layer, and including a second contact hole; a passivation layer disposed on the common electrode, and including a third contact hole; and a pixel electrode disposed on the passivation layer, and being in contact with the drain electrode, in which the third contact hole is disposed to be adjacent to one surface of the first contact hole for improvement of an aperture ratio and a stable electrode connection.

    THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
    6.
    发明申请
    THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME 有权
    薄膜晶体管及其制造方法

    公开(公告)号：US20160197196A1

    公开(公告)日：2016-07-07

    申请号：US14800187

    申请日：2015-07-15

    Applicant: Samsung Display Co., Ltd.

    Inventor： DONG GUN OH ,  Young Gu Kang ,  Sung In Ro ,  Jae Hak Lee ,  Sung Hoon Lim ,  Woong Ki Jeon

    IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66

    CPC classification number: H01L27/124 ,  H01L27/1214 ,  H01L27/1248 ,  H01L27/1259 ,  H01L27/1262 ,  H01L29/66742 ,  H01L29/78648 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/7869

    Abstract: A thin film transistor is provided as follows. A first gate electrode and a second gate electrode are stacked on each other. A semiconductor layer is interposed between the first and second gate electrodes. A source electrode and a drain electrode are interposed between the semiconductor layer and the second gate electrode. A connection electrode connects electrically the first gate electrode and the second gate electrode. A first insulating film is interposed between the first gate electrode and the semiconductor layer. A second insulating film includes a first part interposed between the semiconductor layer and the second gate electrode and a second part interposed between the second gate electrode and the drain electrode. A third insulating film includes a first part interposed between the connection electrode and the second gate electrode.

    Abstract translation: 如下提供薄膜晶体管。 第一栅电极和第二栅电极彼此堆叠。 半导体层介于第一和第二栅电极之间。 源电极和漏电极插入在半导体层和第二栅电极之间。 连接电极电连接第一栅电极和第二栅电极。 第一绝缘膜介于第一栅电极和半导体层之间。 第二绝缘膜包括插入在半导体层和第二栅电极之间的第一部分和介于第二栅电极和漏电极之间的第二部分。 第三绝缘膜包括插入在连接电极和第二栅电极之间的第一部分。

    Liquid crystal display
    7.
    发明授权
    Liquid crystal display 有权
    液晶显示器

    公开(公告)号：US09122117B2

    公开(公告)日：2015-09-01

    申请号：US14213506

    申请日：2014-03-14

    Applicant: Samsung Display Co., Ltd.

    Inventor： Sung In Ro ,  Seung Hyun Park ,  Hyang Yul Kim ,  Jae Hak Lee

    IPC: G09G3/36 ,  G02F1/1362 ,  G01R13/40

    CPC classification number: G02F1/136286 ,  G01R13/405 ,  G02F1/136213 ,  G02F2201/123 ,  G09G3/3648 ,  G09G3/3688 ,  G09G2320/0219

    Abstract: A liquid crystal display includes: a display area including: a first data line between a first pixel electrode and a second pixel electrode in a same pixel row, and connected to a first thin film transistor (“TFT”) and a second TFT, respectively; and a peripheral area including: a first parasitic capacitor capacity measuring unit including first gate capacity units and first data capacity units; a second parasitic capacitor capacity measuring unit including second gate capacity units and second data capacity units, where a relative arrangement between the first gate and data capacity units is the same as a relative arrangement between the gate and drain electrodes of the first TFT, and a relative arrangement between the second gate and data capacity units is the same as a relative arrangement between the gate and drain electrodes of the second TFT.

    Abstract translation: 液晶显示器包括：显示区域，包括：在相同像素行中的第一像素电极和第二像素电极之间的第一数据线，并分别连接到第一薄膜晶体管（“TFT”）和第二TFT ; 以及周边区域，包括：第一寄生电容器容量测量单元，包括第一栅极容量单元和第一数据容量单元; 第二寄生电容器容量测量单元，包括第二栅极容量单元和第二数据容量单元，其中第一栅极和数据电容单元之间的相对布置与第一TFT的栅极和漏极之间的相对布置相同， 第二栅极和数据容量单元之间的相对布置与第二TFT的栅极和漏极之间的相对布置相同。

    THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF
    10.
    发明申请
    THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF 审中-公开
    薄膜晶体管及其制造方法

    公开(公告)号：US20140231810A1

    公开(公告)日：2014-08-21

    申请号：US13903171

    申请日：2013-05-28

    Applicant: Samsung Display Co., Ltd.

    Inventor： Seung Hyun Park ,  Jun Ho Song ,  Jae Hak Lee

    IPC: H01L29/786 ,  H01L29/66

    CPC classification number: H01L29/786 ,  H01L29/41733 ,  H01L29/6675 ,  H01L29/78678 ,  H01L29/7869

    Abstract: A thin film transistor, includes: a gate electrode; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; an etch stopper disposed on a channel of the semiconductor; a source electrode disposed on the semiconductor; and a drain electrode disposed on the semiconductor. At least one of the source electrode and the drain electrode does not overlap with the etch stopper. At least one dimension of the etch stopper and the channel of the semiconductor are substantially the same.

    Abstract translation: 一种薄膜晶体管，包括：栅电极; 设置在栅电极上的栅极绝缘层; 设置在所述栅极绝缘层上的半导体; 设置在半导体通道上的蚀刻停止器; 设置在所述半导体上的源电极; 以及设置在半导体上的漏电极。 源电极和漏电极中的至少一个与蚀刻停止件不重叠。 蚀刻停止器和半导体的通道的至少一个尺寸基本上相同。

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