公开(公告)号：US20150364102A1

公开(公告)日：2015-12-17

申请号：US14693517

申请日：2015-04-22

Applicant: Samsung Display Co., Ltd.

Inventor： DONG GUN OH ,  SEUNGHYUN PARK ,  JiEun LEE ,  Cheol-Gon LEE ,  Woongki JEON

IPC: G09G3/36 ,  G09G3/32

CPC classification number: H01L27/3262 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2201/40 ,  H01L27/3248 ,  H01L27/3276 ,  H01L51/5209 ,  H01L51/5225

Abstract: A display apparatus includes a first substrate including a channel-forming area, a second substrate facing the first substrate, a thin-film transistor disposed on the first substrate, a pixel electrode electrically connected to the thin-film transistor, a gate line disposed on the first substrate and electrically connected to the thin-film transistor, a data line electrically connected to the thin-film transistor and divided into at least two portions such that the channel-forming area is disposed between the two portions of the data line, and a connection portion electrically connecting the two portions of the data line to each other, in which the thin-film transistor includes a gate electrode branched from the gate line and overlapping the channel-forming area, a semiconductor pattern overlapping the gate electrode and contacting the two portions of the data line so that the channel-forming area is disposed in the semiconductor pattern, and a drain electrode electrically connected to the pixel electrode and overlapping the semiconductor pattern.

Abstract translation: 显示装置包括：第一基板，包括沟道形成区域;面向第一基板的第二基板;设置在第一基板上的薄膜晶体管，与薄膜晶体管电连接的像素电极;栅线; 所述第一基板并电连接到所述薄膜晶体管，数据线电连接到所述薄膜晶体管并被分成至少两个部分，使得所述沟道形成区域设置在所述数据线的两个部分之间，以及 所述连接部将所述数据线的两部分彼此电连接，所述连接部将所述数据线的两部分彼此电连接，所述连接部将所述薄膜晶体管包括从所述栅极线分支并与所述沟道形成区域重叠的栅电极， 数据线的两部分，使得沟道形成区域设置在半导体图案中，并且漏电极电连接到该半导体图案 像素电极并与半导体图案重叠。

公开(公告)号：US20160197196A1

公开(公告)日：2016-07-07

申请号：US14800187

申请日：2015-07-15

Applicant: Samsung Display Co., Ltd.

Inventor： DONG GUN OH ,  Young Gu Kang ,  Sung In Ro ,  Jae Hak Lee ,  Sung Hoon Lim ,  Woong Ki Jeon

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L27/124 ,  H01L27/1214 ,  H01L27/1248 ,  H01L27/1259 ,  H01L27/1262 ,  H01L29/66742 ,  H01L29/78648 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/7869

Abstract: A thin film transistor is provided as follows. A first gate electrode and a second gate electrode are stacked on each other. A semiconductor layer is interposed between the first and second gate electrodes. A source electrode and a drain electrode are interposed between the semiconductor layer and the second gate electrode. A connection electrode connects electrically the first gate electrode and the second gate electrode. A first insulating film is interposed between the first gate electrode and the semiconductor layer. A second insulating film includes a first part interposed between the semiconductor layer and the second gate electrode and a second part interposed between the second gate electrode and the drain electrode. A third insulating film includes a first part interposed between the connection electrode and the second gate electrode.

Abstract translation: 如下提供薄膜晶体管。 第一栅电极和第二栅电极彼此堆叠。 半导体层介于第一和第二栅电极之间。 源电极和漏电极插入在半导体层和第二栅电极之间。 连接电极电连接第一栅电极和第二栅电极。 第一绝缘膜介于第一栅电极和半导体层之间。 第二绝缘膜包括插入在半导体层和第二栅电极之间的第一部分和介于第二栅电极和漏电极之间的第二部分。 第三绝缘膜包括插入在连接电极和第二栅电极之间的第一部分。

公开(公告)号：US20170084634A1

公开(公告)日：2017-03-23

申请号：US15370445

申请日：2016-12-06

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： DONG GUN OH ,  YOUNG GU KANG ,  SUNG IN RO ,  JAE HAK LEE ,  SUNG HOON LIM ,  WOONG KI JEON

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L27/124 ,  H01L27/1214 ,  H01L27/1248 ,  H01L27/1259 ,  H01L27/1262 ,  H01L29/66742 ,  H01L29/78648 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/7869

Abstract: A thin film transistor is provided as follows. A first gate electrode and a second gate electrode are stacked on each other. A semiconductor layer is interposed between the first and second gate electrodes. A source electrode and a drain electrode are interposed between the semiconductor layer and the second gate electrode. A connection electrode connects electrically the first gate electrode and the second gate electrode. A first insulating film is interposed between the first gate electrode and the semiconductor layer. A second insulating film includes a first part interposed between the semiconductor layer and the second gate electrode and a second part interposed between the second gate electrode and the drain electrode. A third insulating film includes a first part interposed between the connection electrode and the second gate electrode.