公开(公告)号：US12107167B2

公开(公告)日：2024-10-01

申请号：US17762929

申请日：2021-01-20

Applicant: SOUTHEAST UNIVERSITY

Inventor： Siyang Liu ,  Weifeng Sun ,  Chi Zhang ,  Shuxuan Xin ,  Shen Li ,  Le Qian ,  Chen Ge ,  Longxing Shi

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/778 ,  H01L29/812

CPC classification number: H01L29/7851 ,  H01L29/1095 ,  H01L29/778 ,  H01L29/8122

Abstract: The present invention discloses a high-threshold power semiconductor device and a manufacturing method thereof. The high-threshold power semiconductor device includes, in sequence from bottom to top: a metal drain electrode, a substrate, a buffer layer, and a drift region; further including: a composite column body which is jointly formed by a drift region protrusion, a columnar p-region and a columnar n-region on the drift region, a channel layer, a passivation layer, a dielectric layer, a heavily doped semiconductor layer, a metal gate electrode and a source metal electrode. The composite column body is formed by sequentially depositing a p-type semiconductor layer and an n-type semiconductor layer on the drift region and then etching same. The channel layer and the passivation layer are formed in sequence by deposition. Thus, the above devices are divided into a cell region and a terminal region. The dielectric layer, the heavily doped semiconductor layer, the metal gate electrode and the source metal electrode only exist in the cell region, and the passivation layer of the terminal region extends upwards and is wrapped outside the channel layer. This structure can increase a threshold voltage of the device, improve the blocking characteristics of the device and reduce the size of a gate capacitance.