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公开(公告)号：US11276821B2
公开(公告)日：2022-03-15
申请号：US16741936
申请日：2020-01-14
发明人： Seulji Song , Jonguk Kim , Kyusul Park , Woohyun Park , Jonghyun Paek
摘要： A semiconductor device includes a plurality of first conductive lines disposed on a substrate, a plurality of second conductive lines intersecting the plurality of first conductive lines, and a plurality of cell structures interposed between the plurality of first conductive lines and the plurality of second conductive lines. At least one among the plurality of cell structures includes a first electrode, a switching element disposed on the first electrode, a second electrode disposed on the switching element, a first metal pattern disposed on the second electrode, a variable resistance pattern interposed between the first metal pattern and at least one among the plurality of second conductive lines, and a first spacer disposed on a sidewall of the variable resistance pattern, a sidewall of the first metal pattern and a sidewall of the second electrode.
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公开(公告)号：US10510737B2
公开(公告)日：2019-12-17
申请号：US15786698
申请日：2017-10-18
发明人： Jichul Kim , Chajea Jo , Sang-Uk Han , Kyoung Soon Cho , Jae Choon Kim , Woohyun Park
IPC分类号： H01L25/18 , H01L27/146 , H01L23/00 , H01L25/00 , H01L23/367 , H01L23/18
摘要： A semiconductor package includes a first semiconductor chip on a substrate, a second semiconductor chip on the substrate and spaced apart from the first semiconductor device, a mold layer on the substrate and covering sides of the first and second semiconductor chips, and an image sensor unit on the first and second semiconductor chips and the mold layer. The image sensor unit is electrically connected to the first semiconductor chip.
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公开(公告)号：US11600608B2
公开(公告)日：2023-03-07
申请号：US17204225
申请日：2021-03-17
发明人： Jichul Kim , Chajea Jo , Sang-Uk Han , Kyoung Soon Cho , Jae Choon Kim , Woohyun Park
IPC分类号： H01L25/18 , H01L27/146 , H01L23/00 , H01L25/00 , H01L23/367 , H01L21/56 , H01L23/31 , H01L25/065 , H01L23/18
摘要： A semiconductor package includes a first semiconductor chip on a substrate, a second semiconductor chip on the substrate and spaced apart from the first semiconductor device, a mold layer on the substrate and covering sides of the first and second semiconductor chips, and an image sensor unit on the first and second semiconductor chips and the mold layer. The image sensor unit is electrically connected to the first semiconductor chip.
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公开(公告)号：US10985152B2
公开(公告)日：2021-04-20
申请号：US16503121
申请日：2019-07-03
发明人： Jichul Kim , Chajea Jo , Sang-Uk Han , Kyoung Soon Cho , Jae Choon Kim , Woohyun Park
IPC分类号： H01L25/18 , H01L27/146 , H01L23/00 , H01L25/00 , H01L23/367 , H01L21/56 , H01L23/31 , H01L25/065 , H01L23/18
摘要： A semiconductor package includes a first semiconductor chip on a substrate, a second semiconductor chip on the substrate and spaced apart from the first semiconductor device, a mold layer on the substrate and covering sides of the first and second semiconductor chips, and an image sensor unit on the first and second semiconductor chips and the mold layer. The image sensor unit is electrically connected to the first semiconductor chip.
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公开(公告)号：US20190139984A1
公开(公告)日：2019-05-09
申请号：US16220836
申请日：2018-12-14
发明人： Jongwon KIM , Keejeong Rho , Jin-Yeon Won , Tae-Wan Lim , Woohyun Park
IPC分类号： H01L27/11582 , H01L27/11565
CPC分类号： H01L27/11582 , H01L27/11565
摘要： Semiconductor memory devices and methods for manufacturing the same are provided. The device may include vertical channel structures that are two-dimensionally arranged on a substrate and vertically extend from the substrate. The device may also include bit lines on the vertical channel structures, and each of the bit lines may be commonly connected to the vertical channel structures arranged in a first direction. The device may further include common source lines that extend between the vertical channel structures in a second direction intersecting the first direction and a source strapping line that is disposed at the same vertical level as the bit lines and electrically connects the common source lines to each other.
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公开(公告)号：US11502130B2
公开(公告)日：2022-11-15
申请号：US16937963
申请日：2020-07-24
发明人： Kyusul Park , Woohyun Park , Ilmok Park , Seulji Song
摘要： A variable resistance memory device and a method of fabricating a variable resistance memory device, the device including first conductive lines extending in a first direction; second conductive lines extending in a second direction crossing the first direction; and memory cells at respective intersection points of the first conductive lines and the second conductive lines, wherein each of the memory cells includes a switching pattern, an intermediate electrode, a variable resistance pattern, and an upper electrode, which are between the first and second conductive lines and are connected in series; and a spacer structure including a first spacer and a second spacer, the first spacer being on a side surface of the upper electrode, and the second spacer covering the first spacer and a side surface of the variable resistance pattern such that the second spacer is in contact with the side surface of the variable resistance pattern.
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公开(公告)号：US10700088B2
公开(公告)日：2020-06-30
申请号：US16220836
申请日：2018-12-14
发明人： Jongwon Kim , Keejeong Rho , Jin-Yeon Won , Tae-Wan Lim , Woohyun Park
IPC分类号： H01L27/11582 , H01L27/11565
摘要： Semiconductor memory devices and methods for manufacturing the same are provided. The device may include vertical channel structures that are two-dimensionally arranged on a substrate and vertically extend from the substrate. The device may also include bit lines on the vertical channel structures, and each of the bit lines may be commonly connected to the vertical channel structures arranged in a first direction. The device may further include common source lines that extend between the vertical channel structures in a second direction intersecting the first direction and a source strapping line that is disposed at the same vertical level as the bit lines and electrically connects the common source lines to each other.
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