公开(公告)号：US20230026211A1

公开(公告)日：2023-01-26

申请号：US17814828

申请日：2022-07-25

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Jong Ho Park ,  Gyu Ho Kang ,  Seong-Hoon Bae ,  Jeong Gi Jin ,  Ju-Il Choi ,  Atsushi Fujisaki

IPC分类号： H01L23/13 ,  H01L25/16 ,  H01L21/56 ,  H01L23/498 ,  H01L23/31

摘要： A semiconductor package includes a wiring structure that includes a first insulating layer and a first conductive pattern inside the first insulating layer, a first semiconductor chip disposed on the wiring structure, an interposer that includes a second insulating layer, a second conductive pattern inside the second insulating layer, and a recess that includes a first sidewall formed on a first surface of the interposer that faces the first semiconductor chip and a first bottom surface connected with the first sidewall, where the recess exposes at least a portion of the second insulating layer, a first element bonded to the interposer and that faces the first semiconductor chip inside the recess, and a mold layer that covers the first semiconductor chip and the first element.

公开(公告)号：US11742271B2

公开(公告)日：2023-08-29

申请号：US17306988

申请日：2021-05-04

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Gyuho Kang ,  Seong-Hoon Bae ,  Jin Ho An ,  Teahwa Jeong ,  Ju-Il Choi ,  Atsushi Fujisaki

IPC分类号： H01L23/498 ,  H01L25/10 ,  H01L23/00 ,  H01L25/065

CPC分类号： H01L23/49822 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/16 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/05015 ,  H01L2224/05017 ,  H01L2224/05555 ,  H01L2224/05558 ,  H01L2224/05582 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/182

摘要： A semiconductor package includes; a redistribution substrate including a redistribution pattern, a semiconductor chip mounted on a top surface of the redistribution substrate, and a connection terminal between the semiconductor chip and the redistribution substrate. The redistribution substrate further includes; a pad structure including a pad interconnection and a pad via, disposed between the redistribution pattern and the connection terminal, wherein the pad structure is electrically connected to the redistribution pattern and a top surface of the pad structure contacts the connection terminal, a shaped insulating pattern disposed on a top surface of the redistribution pattern, and a pad seed pattern disposed on the redistribution pattern and covering the shaped insulating pattern.

公开(公告)号：US12107063B2

公开(公告)日：2024-10-01

申请号：US17204313

申请日：2021-03-17

申请人： Samsung Electronics Co., Ltd.

发明人： Ju-Il Choi ,  Gyuho Kang ,  Heewon Kim ,  Junyoung Park ,  Seong-Hoon Bae ,  Jin Ho An

IPC分类号： H01L23/38 ,  H01L23/00 ,  H01L23/532 ,  H01L23/538

CPC分类号： H01L24/14 ,  H01L23/53238 ,  H01L23/5386 ,  H01L2224/0401 ,  H01L2224/12105 ,  H01L2224/13024

摘要： A semiconductor package device may include a redistribution substrate and a semiconductor chip on a top surface of the redistribution substrate. The redistribution substrate may include an under-bump pattern, which includes including a body portion and a protruding portion extended from the body portion to form a single object, an insulating layer covering a side surface of the body portion, and an outer coupling terminal on the protruding portion. The body portion may have a first diameter in a first direction parallel to the top surface of the redistribution substrate, and the protruding portion may have a second diameter in the first direction, which is smaller than the first diameter. A top surface of the protruding portion may be parallel to the first direction, and a side surface of the protruding portion may be inclined at an angle to a top surface of the body portion.

公开(公告)号：US20240213133A1

公开(公告)日：2024-06-27

申请号：US18208415

申请日：2023-06-12

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Hyungjun PARK ,  Gyuho Kang ,  Seong-Hoon Bae ,  Sang-Hyuck Oh ,  Kwangok Jeong ,  Ju-Il Choi

IPC分类号： H01L23/498 ,  H01L21/48 ,  H05K1/11 ,  H05K3/46

CPC分类号： H01L23/49838 ,  H01L21/4857 ,  H01L23/49822 ,  H05K1/113 ,  H05K3/4644 ,  H05K2201/10674

摘要： A redistribution substrate includes first and second insulating layers; a wiring layer, and a metal layer. The wiring pattern includes a via portion penetrating the first insulating layer and a pad portion on the via portion, the pad portion extending onto an upper surface of the first insulating layer. The metal layer covers an upper surface of the wiring pattern. The second insulating layer is provided on the first insulating layer and covers the pad portion and the metal layer. The wiring pattern includes a first metal. The metal layer includes the first metal and a second metal. The metal layer includes a first portion vertically overlapping the pad portion, and a second portion surrounding the first portion, and a concentration of the first metal in the first portion of the metal layer is greater than a concentration of the first metal in the second portion of the metal layer.

公开(公告)号：US20240047319A1

公开(公告)日：2024-02-08

申请号：US18125348

申请日：2023-03-23

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Jongho PARK ,  Gyuho Kang ,  Sung Keun Park ,  Seong-Hoon Bae ,  Jaemok Jung ,  Ju-ll Choi

IPC分类号： H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L25/10 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00

CPC分类号： H01L23/49811 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/105 ,  H01L21/4853 ,  H01L21/563 ,  H01L25/50 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/48227 ,  H01L24/48

摘要： A semiconductor package includes a first substrate, a semiconductor chip on the first substrate, a second substrate spaced apart from the first substrate, a wire spaced apart from a lateral surface of the semiconductor chip and connecting the first substrate to the second substrate, a mold structure on a top surface of the semiconductor chip, the lateral surface of the semiconductor chip, and a lateral surface of the wire, and an under-fill pattern on the lateral surface of the wire and is between the wire and the mold structure.

公开(公告)号：US11664312B2

公开(公告)日：2023-05-30

申请号：US17147661

申请日：2021-01-13

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Ju-Il Choi ,  Gyuho Kang ,  Seong-Hoon Bae ,  Dongjoon Oh ,  Chungsun Lee ,  Hyunsu Hwang

IPC分类号： H01L23/532 ,  H01L23/00 ,  H01L23/48 ,  H01L23/522

CPC分类号： H01L23/53238 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/5329 ,  H01L24/05 ,  H01L24/08 ,  H01L24/16 ,  H01L2224/05647 ,  H01L2224/08145 ,  H01L2224/16227

摘要： A semiconductor device includes a first semiconductor chip that includes a first conductive pad whose top surface is exposed; and a second semiconductor chip that includes a second conductive pad whose top surface is exposed and in contact with at least a portion of the top surface of the first conductive pad. The first semiconductor chip may include a first diffusion barrier in contact with a bottom surface of the first conductive pad, and a second diffusion barrier in contact with a lateral surface of the first conductive pad, and the first diffusion barrier and the second diffusion barrier may include different materials from each other.