SEMICONDUCTOR PACKAGE
    1.
    发明申请

    公开(公告)号:US20210202426A1

    公开(公告)日:2021-07-01

    申请号:US17201538

    申请日:2021-03-15

    Abstract: A semiconductor package includes a first connection structure having first and second surfaces and including a first redistribution layer, a first semiconductor chip disposed on the first surface and having a first connection pad electrically connected to the first redistribution layer, a second semiconductor chip disposed around the first semiconductor chip on the first surface and having a second connection pad electrically connected to the first redistribution layer, an interconnection bridge disposed on the second surface to be spaced apart from the second surface and connected to the first redistribution layer through a connection member to electrically connect the first and second connection pads to each other, and a second connection structure disposed on the second surface to embed the interconnection bridge and including a second redistribution layer electrically connected to the first redistribution layer.

    ELECTRONIC DEVICE COMPRISING ACCESSORY
    2.
    发明申请

    公开(公告)号:US20200166973A1

    公开(公告)日:2020-05-28

    申请号:US16612892

    申请日:2018-05-21

    Abstract: Various embodiments relating to an electronic device comprising an accessory are described. An electronic device according to one embodiment comprises: a first electronic device forming a first curved surface on at least one side and including at least one first magnet on the first curved surface; a second electronic device forming a second curved surface on at least one side and including at least one second magnet on the second curved surface; and an accessory structure including third and fourth curved surfaces facing the first and second curved surfaces, and including at least one third and fourth magnets on the third and fourth curved surfaces, wherein the accessory structure may attach and detach the at least one first and second magnets and the at least one third and fourth magnets by magnetic force, may rotate the first and second curved surfaces along the third and fourth curved surfaces, and may be bent during rotation so as to mount the first electronic device at various angles. Other various embodiments are also possible.

    SEMICONDUCTOR PACKAGE
    4.
    发明申请

    公开(公告)号:US20220352107A1

    公开(公告)日:2022-11-03

    申请号:US17863818

    申请日:2022-07-13

    Abstract: A semiconductor package includes a first connection structure having first and second surfaces and including a first redistribution layer, a first semiconductor chip disposed on the first surface and having a first connection pad electrically connected to the first redistribution layer, a second semiconductor chip disposed around the first semiconductor chip on the first surface and having a second connection pad electrically connected to the first redistribution layer, an interconnection bridge disposed on the second surface to be spaced apart from the second surface and connected to the first redistribution layer through a connection member to electrically connect the first and second connection pads to each other, and a second connection structure disposed on the second surface to embed the interconnection bridge and including a second redistribution layer electrically connected to the first redistribution layer.

    SEMICONDUCTOR PACKAGE AND BOARD FOR MOUNTING THE SAME

    公开(公告)号:US20200083176A1

    公开(公告)日:2020-03-12

    申请号:US16207053

    申请日:2018-11-30

    Abstract: A semiconductor package includes a semiconductor chip having an active surface on which connection pads are disposed and an inactive surface opposing the active surface, an encapsulant disposed to cover at least a portion of the semiconductor chip, and a connection member including a redistribution layer. The redistribution layer includes a plurality of first pads, a plurality of second pads surrounding the plurality of first pads, and a plurality of third pads surrounding the plurality of second pads. Each of the plurality of second pads and each of the plurality of third pads have shapes different from a shape of each of the plurality of first pads. Gaps between the plurality of second pads and gaps between the plurality of third pads are staggered with each other.

    SEMICONDUCTOR PACKAGE
    7.
    发明申请

    公开(公告)号:US20200266167A1

    公开(公告)日:2020-08-20

    申请号:US16388004

    申请日:2019-04-18

    Abstract: The present disclosure relates to a semiconductor package including a first semiconductor chip having a first surface on which first connection pads are disposed, and a second surface on which second connection pads are disposed, and including through-vias connected to the second connection pads; a connection structure disposed on the first surface and including a first redistribution layer; a first redistribution disposed on the second surface; and a second semiconductor chip disposed on the connection structure. The first connection pads are connected to a signal pattern of the first redistribution layer, and the second connection pads are connected to at least one of a power pattern and a ground pattern of the second redistribution layer.

    SEMICONDUCTOR PACKAGE
    8.
    发明申请

    公开(公告)号:US20190273030A1

    公开(公告)日:2019-09-05

    申请号:US16110436

    申请日:2018-08-23

    Abstract: A semiconductor package includes a first semiconductor package including a core member having a through-hole, a first semiconductor chip disposed in the through-hole and having an active surface with a connection pad disposed thereon, a first encapsulant for encapsulating at least a portion of the first semiconductor chip, and a connection member disposed on the active surface of the first semiconductor chip and including a redistribution layer electrically connected to the connection pad of the first semiconductor chip, a second semiconductor package disposed on the first semiconductor package and including a wiring substrate electrically connected to the connection member, at least one second semiconductor chip disposed on the wiring substrate, and a second encapsulant for encapsulating at least a portion of the second semiconductor chip, and a heat dissipation member covering a lateral surface of the second semiconductor package and exposing an upper surface of the second encapsulant.

    SEMICONDUCTOR PACKAGE
    9.
    发明申请

    公开(公告)号:US20220189860A1

    公开(公告)日:2022-06-16

    申请号:US17687072

    申请日:2022-03-04

    Abstract: A semiconductor package includes: a semiconductor chip having an active surface, on which a connection pad is disposed, and an inactive surface opposite to the active surface; a heat-dissipating member disposed on the inactive surface of the semiconductor chip and including graphite; an encapsulant sealing at least a portion of each of the semiconductor chip and the heat-dissipating member; a capping metal layer disposed directly between the heat-dissipating member and the encapsulant; and a connection structure disposed on the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pad, wherein the heat-dissipating member includes holes passing through at least a portion of the heat-dissipating member, and the holes overlap the inactive surface of the semiconductor chip.

    SEMICONDUCTOR PACKAGE FOR REDUCING STRESS TO REDISTRIBUTION VIA

    公开(公告)号:US20200350270A1

    公开(公告)日:2020-11-05

    申请号:US16932185

    申请日:2020-07-17

    Abstract: A semiconductor package includes: a connection member having a first surface and a second surface opposing each other in a stacking direction of the semiconductor package and including an insulating member and a redistribution layer formed on the insulating member and having a redistribution via; a semiconductor chip disposed on the first surface of the connection member and having connection pads connected to the redistribution layer; an encapsulant disposed on the first surface of the connection member and encapsulating the semiconductor chip; a passivation layer disposed on the second surface of the connection member; UBM pads disposed on the passivation layer and overlapping the redistribution vias in the stacking direction; and UBM vias connecting the UBM pads to the redistribution layer through the passivation layer, not overlapping the redistribution vias with respect to the stacking direction, and having a non-circular cross section.

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