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公开(公告)号:US20230307353A1
公开(公告)日:2023-09-28
申请号:US17933770
申请日:2022-09-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: YOHAN LEE , CHAEHOON KIM , JAEDUK YU , JIHO CHO
IPC: H01L23/522 , H01L27/11582
CPC classification number: H01L23/5226 , H01L27/11582
Abstract: A semiconductor device includes a CSL driver on a substrate, a CSP on the CSL driver, a gate electrode structure on the CSP and including gate electrodes spaced apart from each other in a first direction perpendicular to an upper surface of the substrate, each of the gate electrodes extends in a second direction parallel to the upper surface of the substrate, a memory channel structure on the CSP and extending through the gate electrode structure and is connected to the CSP, a first upper wiring structure contacting an upper surface of the CSP, a first through via extending through the CSP in the first direction and is electrically connected to the first upper wiring structure and the CSL driver but does not contact the CPS, and a dummy wiring structure contacting the upper surface of the CSP but is not electrically connected to the CSL driver.
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公开(公告)号:US20190157292A1
公开(公告)日:2019-05-23
申请号:US15996483
申请日:2018-06-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: CHANHO KIM , PANSUK KWAK , CHAEHOON KIM , HONGSOO JEON , JEUNGHWAN PARK , BONGSOON LIM
IPC: H01L27/11582 , G11C16/04 , H01L27/1157 , G11C16/24
Abstract: At least one latch of a page buffer of a nonvolatile memory device includes a capacitor that selectively stores a voltage of a sensing node. The capacitor includes at least one first contact having a second height corresponding to a first height of each of cell strings, and at least one second contact to which a ground voltage is supplied. The at least one second contact has a third height corresponding to the first height, disposed adjacent to the at least one first contact, and electrically separated from the at least one first contact.
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公开(公告)号:US20180137900A1
公开(公告)日:2018-05-17
申请号:US15637099
申请日:2017-06-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: CHAEHOON KIM , JIN-YOUNG CHUN , YUNYEONG JEON
IPC: G11C7/12 , G11C7/10 , G11C11/4091 , G11C5/14 , G11C7/18
CPC classification number: G11C7/12 , G11C5/147 , G11C7/1048 , G11C7/1057 , G11C7/106 , G11C7/18 , G11C11/4091 , G11C11/5642 , G11C16/0483 , G11C16/24 , G11C2211/5642
Abstract: A page buffer includes a pre-charge unit for pre-charging a bit line of a selected memory cell of a memory cell array via a first pre-charge line and pre-charging a sensing node via a second pre-charge line, during a pre-charge time, a bit line connection unit connected between the bit line and the sensing node and including a connecting node connected to the first pre-charge line, the bit line connection unit controlling a voltage of the sensing node, during a develop time, based on a bit line connection control signal and a sensing node voltage control signal, and a data input and output unit for generating sensing data by sensing a level of the voltage of the sensing node, during a sensing time.
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