公开(公告)号：US10165349B2

公开(公告)日：2018-12-25

申请号：US15411382

申请日：2017-01-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byung Lyul Park ,  Kang Ho Park

IPC: H04R1/10 ,  H01B7/17 ,  G06F3/16

Abstract: An audio output device and an electronic device are provided. The audio output device includes a plurality of speakers, a terminal connected with a sound source providing device, and a cable connecting the plurality of speakers and the terminal. The cable includes a wire, a flexible element arranged surrounding a portion of the wire, and an insulation member forming an outer sheath of the cable. The flexible element includes a first flexible electrode and a second flexible electrode, and a capacitance of the flexible element changes as the flexible element is deformed.

公开(公告)号：US10103098B2

公开(公告)日：2018-10-16

申请号：US15403480

申请日：2017-01-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Deokyoung Jung ,  Kwangjin Moon ,  Byung Lyul Park ,  Jin Ho An

IPC: H01L23/00 ,  H01L23/522 ,  H01L23/532 ,  H01L23/48

Abstract: Semiconductor devices including a through via structure and methods of forming the same are provided. The semiconductor devices may include a semiconductor substrate including a first surface and a second surface opposite the first surface, a front insulating layer on the first surface of the semiconductor substrate, a back insulating layer on the second surface of the semiconductor substrate, a through via structure extending through the back insulating layer, the semiconductor substrate, and the front insulating layer, a via insulating layer on a side surface of the through via structure, and a contact structure extending through the front insulating layer. The through via structure may include a first region and a second region disposed on the first region. The second region may include a first doping element, and the first region may be substantially free of the first doping element.

公开(公告)号：US20150093896A1

公开(公告)日：2015-04-02

申请号：US14566828

申请日：2014-12-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyu-Ha Lee ,  Ho-Jin Lee ,  Pil-Kyu Kang ,  Byung Lyul Park ,  Hyunsoo Chung ,  Gilheyun Choi

IPC: H01L21/768 ,  H01L23/48 ,  H01L23/522

CPC classification number: H01L21/76898 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/5226 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/05552

Abstract: The inventive concept provides semiconductor devices having through-vias and methods for fabricating the same. The method may include forming a via-hole opened toward a top surface of a substrate and partially penetrating the substrate, forming a via-insulating layer having a first thickness on a bottom surface of the via-hole and a second thickness smaller than the first thickness on an inner sidewall of the via-hole, forming a through-via in the via-hole which the via-insulating layer is formed in, and recessing a bottom surface of the substrate to expose the through-via. Forming the via-insulating layer may include forming a flowable layer on the substrate, and converting the flowable layer into a first flowable chemical vapor deposition layer having the first thickness on the bottom surface of the via-hole.

Abstract translation: 本发明构思提供了具有通孔的半导体器件及其制造方法。 该方法可以包括形成朝向衬底的顶表面开口并部分地穿透衬底的通孔，在通孔的底表面上形成具有第一厚度的通孔绝缘层，并且小于第一厚度的第二厚度 在通孔的内侧壁上的厚度，在形成通孔绝缘层的通孔中形成通孔，并使基板的底表面凹陷以露出通孔。 形成通孔绝缘层可以包括在基板上形成可流动层，并且将可流动层转化为具有第一厚度的第一可流动化学气相沉积层，其在通孔的底表面上。

公开(公告)号：US08941216B2

公开(公告)日：2015-01-27

申请号：US13749727

申请日：2013-01-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyu-Ha Lee ,  Ho-Jin Lee ,  Pil-Kyu Kang ,  Byung Lyul Park ,  Hyunsoo Chung ,  Gilheyun Choi

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/48 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L21/76898 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/5226 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/05552

Abstract: The inventive concept provides semiconductor devices having through-vias and methods for fabricating the same. The method may include forming a via-hole opened toward a top surface of a substrate and partially penetrating the substrate, forming a via-insulating layer having a first thickness on a bottom surface of the via-hole and a second thickness smaller than the first thickness on an inner sidewall of the via-hole, forming a through-via in the via-hole which the via-insulating layer is formed in, and recessing a bottom surface of the substrate to expose the through-via. Forming the via-insulating layer may include forming a flowable layer on the substrate, and converting the flowable layer into a first flowable chemical vapor deposition layer having the first thickness on the bottom surface of the via-hole.

Abstract translation: 本发明构思提供了具有通孔的半导体器件及其制造方法。 该方法可以包括形成朝向衬底的顶表面开口并部分地穿透衬底的通孔，在通孔的底表面上形成具有第一厚度的通孔绝缘层，并且小于第一厚度的第二厚度 在通孔的内侧壁上的厚度，在形成通孔绝缘层的通孔中形成通孔，并使基板的底表面凹陷以露出通孔。 形成通孔绝缘层可以包括在基板上形成可流动层，并且将可流动层转化为具有第一厚度的第一可流动化学气相沉积层，其在通孔的底表面上。

公开(公告)号：US20130207241A1

公开(公告)日：2013-08-15

申请号：US13749727

申请日：2013-01-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyu-Ha Lee ,  Ho-Jin Lee ,  Pil-Kyu Kang ,  Byung Lyul Park ,  Hyunsoo Chung ,  Gilheun Choi

IPC: H01L23/522

CPC classification number: H01L21/76898 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/5226 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/05552

Abstract: The inventive concept provides semiconductor devices having through-vias and methods for fabricating the same. The method may include forming a via-hole opened toward a top surface of a substrate and partially penetrating the substrate, forming a via-insulating layer having a first thickness on a bottom surface of the via-hole and a second thickness smaller than the first thickness on an inner sidewall of the via-hole, forming a through-via in the via-hole which the via-insulating layer is formed in, and recessing a bottom surface of the substrate to expose the through-via. Forming the via-insulating layer may include forming a flowable layer on the substrate, and converting the flowable layer into a first flowable chemical vapor deposition layer having the first thickness on the bottom surface of the via-hole.

Abstract translation: 本发明构思提供了具有通孔的半导体器件及其制造方法。 该方法可以包括形成朝向衬底的顶表面开口并部分地穿透衬底的通孔，在通孔的底表面上形成具有第一厚度的通孔绝缘层，并且小于第一厚度的第二厚度 在通孔的内侧壁上的厚度，在形成通孔绝缘层的通孔中形成通孔，并使基板的底表面凹陷以露出通孔。 形成通孔绝缘层可以包括在基板上形成可流动层，并且将可流动层转化为具有第一厚度的第一可流动化学气相沉积层，其在通孔的底表面上。

公开(公告)号：US11710715B2

公开(公告)日：2023-07-25

申请号：US17208005

申请日：2021-03-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joo Hyung Lee ,  Ki Tae Park ,  Byung Lyul Park ,  Joon Seok Oh ,  Jong Ho Yun

IPC: H01L25/10 ,  H01L23/00 ,  H01L25/18 ,  H01L23/498 ,  H01L23/31

CPC classification number: H01L24/24 ,  H01L24/05 ,  H01L24/25 ,  H01L25/105 ,  H01L25/18 ,  H01L23/3107 ,  H01L23/49822 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/13024 ,  H01L2224/2405 ,  H01L2224/2413 ,  H01L2224/24155 ,  H01L2224/2505 ,  H01L2224/25171 ,  H01L2224/25174 ,  H01L2224/82101 ,  H01L2224/82106 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058

Abstract: A semiconductor package includes an insulating layer including a first face and a second face opposite each other, a redistribution pattern including a wiring region and a via region in the insulating layer, the wiring region being on the via region, and a first semiconductor chip connected to the redistribution pattern. The first semiconductor chip may be on the redistribution pattern. An upper face of the wiring region may be coplanar with the first face of the insulating layer.

公开(公告)号：US10401912B2

公开(公告)日：2019-09-03

申请号：US15415485

申请日：2017-01-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byung Lyul Park ,  Seung Jai Lee ,  Bo Ra Han

IPC: G06F1/16 ,  G06F9/54

Abstract: A portable electronic device and a protection case thereof are provided. The portable electronic device includes a memory; a display; and a processor configured to acquire, from a flexible element included in a protection case of the portable electronic device, a characteristic value of the flexible element, the characteristic value changing according to bending of the flexible element through movement of the protection case, and determine a state of the protection case, based in the acquired characteristic value.

公开(公告)号：US08710650B2

公开(公告)日：2014-04-29

申请号：US14047548

申请日：2013-10-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sukchul Bang ,  Kwangjin Moon ,  Byung Lyul Park ,  Dosun Lee ,  Deok-Young Jung ,  Gilheyun Choi

IPC: H01L23/34

CPC classification number: H01L23/5226 ,  H01L21/7682 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L25/0657 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/06181 ,  H01L2224/11002 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/351 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00

Abstract: Provided are semiconductor devices having through electrodes and methods of fabricating the same. The method includes providing a substrate including top and bottom surfaces facing each other, forming a hole and a gap extending from the top surface of the substrate toward the bottom surface of the substrate, the gap surrounding the hole and being shallower than the hole, filling the hole with an insulating material, forming a metal interconnection line on the top surface of the substrate on the insulating material, recessing the bottom surface of the substrate to expose the insulating material, removing the insulating material to expose the metal interconnection line via the hole, filling the hole with a conductive material to form a through electrode connected to the metal interconnection line, recessing the bottom surface of the substrate again to expose the gap, and forming a lower insulating layer on the bottom surface of the substrate.

Abstract translation: 提供了具有通过电极的半导体器件及其制造方法。 所述方法包括提供包括彼此面对的顶表面和底表面的基板，形成从基板的顶表面延伸到基板的底表面的孔和间隙，围绕孔的间隙并且比孔更浅，填充 所述孔具有绝缘材料，在所述绝缘材料的所述基板的顶表面上形成金属互连线，凹陷所述基板的底表面以暴露所述绝缘材料，去除所述绝缘材料以经由所述孔暴露所述金属互连线 用导电材料填充孔以形成连接到金属互连线的通孔，再次使基板的底表面露出以露出间隙，并在基板的底表面上形成下绝缘层。

公开(公告)号：US20140110894A1

公开(公告)日：2014-04-24

申请号：US13964433

申请日：2013-08-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ho-Jin Lee ,  Pil-kyu Kang ,  Taeyeong Kim ,  Byung Lyul Park ,  Kyu-Ha Lee ,  Gilheyun Choi

IPC: H01L21/683

CPC classification number: H01L21/6835 ,  H01L24/03 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/92 ,  H01L24/94 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/92 ,  H01L2224/9222 ,  H01L2224/92222 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/15311 ,  H01L2224/03 ,  H01L2924/014 ,  H01L2224/11 ,  H01L2221/68304 ,  H01L21/304 ,  H01L2221/68381 ,  H01L21/78 ,  H01L2224/81

Abstract: A wafer carrier includes a base having a cavity provided at the center of the base and an outer sidewall extending along and away from an edge of the base to define the cavity. The cavity is configured to be filled with an adhesive layer. The wafer carrier is configured to be bonded to a wafer with an adhesive layer in the cavity of base such that the outer sidewall faces and is in contact with an edge of the wafer and the cavity faces a center of the wafer.

Abstract translation: 晶片载体包括具有设置在基部的中心处的空腔的基部和沿着基部的边缘延伸并远离基部的边缘的外侧壁以限定空腔。 空腔构造成填充有粘合剂层。 晶片载体构造成在基底的空腔中与粘合剂层结合到晶片，使得外侧壁面向并与晶片的边缘接触并且空腔面向晶片的中心。

公开(公告)号：US20130200526A1

公开(公告)日：2013-08-08

申请号：US13756833

申请日：2013-02-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwangjin Moon ,  SuKyoung Kim ,  Kunsang Park ,  Byung Lyul Park ,  Sukchul Bang ,  Jin Ho An ,  Kyu-Ha Lee ,  Dosun Lee ,  Gilheyun Choi

IPC: H01L23/498

CPC classification number: H01L23/49827 ,  H01L21/76831 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13022 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2224/05552 ,  H01L2924/00

Abstract: Provided are semiconductor devices with a through electrode and methods of fabricating the same. The methods may include forming a via hole at least partially penetrating a substrate, the via hole having an entrance provided on a top surface of the substrate, forming a via-insulating layer to cover conformally an inner surface of the via hole, forming a buffer layer on the via-insulating layer to cover conformally the via hole provided with the via-insulating layer, the buffer layer being formed of a material whose shrinkability is superior to the via-insulating layer, forming a through electrode to fill the via hole provided with the buffer layer, and recessing a bottom surface of the substrate to expose the through electrode.

Abstract translation: 提供具有通孔的半导体器件及其制造方法。 所述方法可以包括形成至少部分地穿透基板的通孔，所述通孔具有设置在所述基板的顶表面上的入口，形成通孔绝缘层以保形地覆盖所述通孔的内表面，形成缓冲器 所述缓冲层由收缩性优于所述通孔绝缘层的材料形成，形成贯通电极以填充所述通孔，所述通孔设置在所述通孔绝缘层上， 与缓冲层一起凹陷基底的底表面以露出通孔。