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    Passivation layer having an opening for under bump metallurgy
    1.
    发明授权
    Passivation layer having an opening for under bump metallurgy 有权

    公开(公告)号：US10026668B1

    公开(公告)日：2018-07-17

    申请号：US15802170

    申请日：2017-11-02

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Han Ul Lee ,  Jin Su Kim ,  Young Gwan Ko

    IPC: H01L23/48 ,  H01L21/44 ,  H01L23/31 ,  H01L25/18 ,  H01L23/538 ,  H01L23/00 ,  H01L21/56 ,  H01L21/48 ,  H01L21/683 ,  H01L21/3105 ,  H01L23/498

    Abstract: A semiconductor device includes: a chip having an active surface having connection pads disposed thereon; an encapsulant encapsulating at least portions of the chip; a connection member disposed on the active surface of the chip and including a redistribution layer electrically connected to the connection pads; a passivation layer disposed on the connection member; and an under bump metallurgy (UBM) layer at least partially embedded in the passivation layer and electrically connected to the redistribution layer of the connection member. The UBM layer includes a UBM pad partially embedded in the passivation layer and a UVM via penetrating through a portion of the passivation layer and electrically connecting the redistribution layer of the connection member and the UBM pad to each other. A portion of a side surface of the UBM pad is exposed through an opening formed in the passivation layer and the opening surrounds the UBM pad.

    Fan-out semiconductor package
    3.
    发明授权
    Fan-out semiconductor package 有权

    公开(公告)号：US10347586B2

    公开(公告)日：2019-07-09

    申请号：US15986302

    申请日：2018-05-22

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Jin Su Kim ,  Jeong Ho Lee ,  Shang Hoon Seo ,  Bong Ju Cho

    IPC: H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L23/552 ,  H01L21/48 ,  H01L21/56 ,  H01L23/498

    Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion and a stopper layer disposed on a bottom surface of the recess portion; a semiconductor chip having connection pads and disposed in the recess portion so that an inactive surface is disposed on the stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; a connection member disposed on the frame and an active surface of the semiconductor chip and including a redistribution layer electrically connecting the wiring layers and the connection pads to each other; and a guide pattern disposed adjacent to a wall of the recess portion and disposed in the frame. An edge of the bottom surface of the recess portion has a groove portion.

    Passivation layer having opening for under bump metallurgy
    4.
    发明授权
    Passivation layer having opening for under bump metallurgy 有权

    公开(公告)号：US10347556B2

    公开(公告)日：2019-07-09

    申请号：US15966723

    申请日：2018-04-30

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Han Ul Lee ,  Jin Su Kim ,  Young Gwan Ko

    IPC: H01L23/48 ,  H01L21/44 ,  H01L23/31 ,  H01L25/18 ,  H01L23/538 ,  H01L23/00 ,  H01L21/56 ,  H01L21/48 ,  H01L21/683 ,  H01L21/3105 ,  H01L23/498 ,  H01L25/065

    Abstract: A semiconductor device includes: a chip having an active surface having connection pads disposed thereon; an encapsulant encapsulating at least portions of the chip; a connection member disposed on the active surface of the chip and including a redistribution layer electrically connected to the connection pads; a passivation layer disposed on the connection member; and an under bump metallurgy (UBM) layer at least partially embedded in the passivation layer and electrically connected to the redistribution layer of the connection member. The UBM layer includes a UBM pad partially embedded in the passivation layer and a UVM via penetrating through a portion of the passivation layer and electrically connecting the redistribution layer of the connection member and the UBM pad to each other. A portion of a side surface of the UBM pad is exposed through an opening formed in the passivation layer and the opening surrounds the UBM pad.

    Fan-out semiconductor package
    7.
    发明授权
    Fan-out semiconductor package 有权

    公开(公告)号：US10312195B2

    公开(公告)日：2019-06-04

    申请号：US15819541

    申请日：2017-11-21

    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

    Inventor： Ji Hyun Lee ,  Jin Gu Kim ,  Chang Bae Lee ,  Jin Su Kim

    IPC: H01L23/495 ,  H01L23/538 ,  H01L23/00 ,  H01L23/31

    Abstract: A fan-out semiconductor package includes: a semiconductor chip; an encapsulant encapsulating at least portions of the semiconductor chip; and a first connection member disposed on the semiconductor chip and including a first redistribution layer electrically connected to the connection pads and a second redistribution layer electrically connected to the connection pads and disposed on the first redistribution layer. The first redistribution layer includes a first pattern having a plurality of degassing holes, the second redistribution layer includes a second pattern having a first line portion having a first line width and a second line portion connected to the first line portion and having a second line width greater than the first line width, and the second line portion overlaps at least one of the plurality of degassing holes when being projected in a direction perpendicular to the active surface.

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