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公开(公告)号：US20140203958A1
公开(公告)日：2014-07-24
申请号：US14159511
申请日：2014-01-21
Applicant: Renesas Electronics Corporation
Inventor： Yuichi OKUDA , Hideo NAKANE , Takaya YAMAMOTO , Keisuke KIMURA , Takashi OSHIMA , Tatsuji MATSUURA
CPC classification number: H03M1/1009 , G11C27/02 , H03F1/02 , H03F1/3211 , H03F3/005 , H03F3/45071 , H03F3/45475 , H03F2203/45171 , H03F2203/45544 , H03H7/004 , H03M1/002 , H03M1/124 , H03M1/38 , H03M1/44
Abstract: A differential signal is amplified by passive amplification which does not a reference of a common-mode voltage. At this time, the voltage of the differential signal is passive-amplified twice before carrying out a successive approximation type analog-digital conversion operation. The passive amplification is attained by providing a plurality of capacitances which carry out a sampling operation, and switching these connection relation by using switches. Without being accompanied by the increase of the consumed power and the chip size, an influence by the noise of s comparator is reduced to a half so that the effective resolution can be increased for one bit.
Abstract translation: 差分信号被无源放大放大，其不是共模电压的参考。 此时，在进行逐次逼近型模拟数字转换操作之前，差分信号的电压被无源放大两次。 无源放大通过提供执行采样操作的多个电容来实现，并且通过使用开关来切换这些连接关系。 在不伴随消耗功率和芯片尺寸的增加的情况下，将比较器的噪声的影响减小到一半，使得有效分辨率可以增加一位。
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公开(公告)号：US20150249459A1
公开(公告)日：2015-09-03
申请号：US14711200
申请日：2015-05-13
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Takashi OSHIMA , Tatsuji MATSUURA , Yuichi OKUDA , Hideo NAKANE , Takaya YAMAMOTO , Keisuke KIMURA
CPC classification number: H03M1/1033 , H03M1/002 , H03M1/1052 , H03M1/12 , H03M1/201 , H03M1/44 , H03M1/46 , H03M1/66 , H03M1/745
Abstract: To compensate for non-linearity of an AD conversion unit and non-linearity of a DA conversion unit in an electronic system including the DA conversion unit and the AD conversion unit, an electronic system includes an A/D conversion unit, a D/A conversion unit, an AD conversion compensation unit, a DA conversion compensation unit, and a calibration unit. During a calibration operation period, the calibration unit sets an operating characteristic of the AD conversion compensation unit and an operating characteristic of the DA conversion compensation unit. The operating characteristic of the AD conversion compensation unit set during the calibration operation period compensates for non-linearity of AD conversion of the A/D conversion unit. The operating characteristic of the DA conversion compensation unit set during the calibration operation period compensates for non-linearity of DA conversion of the D/A conversion unit.
Abstract translation: 为了补偿包括DA转换单元和AD转换单元的电子系统中的AD转换单元的非线性和DA转换单元的非线性，电子系统包括A / D转换单元，D / A 转换单元，AD转换补偿单元，DA转换补偿单元和校准单元。 在校准操作期间，校准单元设定AD转换补偿单元的工作特性和DA转换补偿单元的工作特性。 在校准操作期间设定的AD转换补偿单元的工作特性补偿A / D转换单元的AD转换的非线性。 在校准操作期间设置的DA转换补偿单元的工作特性补偿D / A转换单元的DA转换的非线性。
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公开(公告)号：US20140333459A1
公开(公告)日：2014-11-13
申请号：US14274813
申请日：2014-05-12
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Takashi OSHIMA , Tatsuji MATSUURA , Yuichi OKUDA , Hideo NAKANE , Takaya YAMAMOTO , Keisuke KIMURA
CPC classification number: H03M1/1033 , H03M1/002 , H03M1/1052 , H03M1/12 , H03M1/201 , H03M1/44 , H03M1/46 , H03M1/66 , H03M1/745
Abstract: To compensate for non-linearity of an AD conversion unit and non-linearity of a DA conversion unit in an electronic system including the DA conversion unit and the AD conversion unit, an electronic system includes an A/D conversion unit, a D/A conversion unit, an AD conversion compensation unit, a DA conversion compensation unit, and a calibration unit. During a calibration operation period, the calibration unit sets an operating characteristic of the AD conversion compensation unit and an operating characteristic of the DA conversion compensation unit. The operating characteristic of the AD conversion compensation unit set during the calibration operation period compensates for non-linearity of AD conversion of the A/D conversion unit. The operating characteristic of the DA conversion compensation unit set during the calibration operation period compensates for non-linearity of DA conversion of the D/A conversion unit.
Abstract translation: 为了补偿包括DA转换单元和AD转换单元的电子系统中的AD转换单元的非线性和DA转换单元的非线性，电子系统包括A / D转换单元，D / A 转换单元，AD转换补偿单元，DA转换补偿单元和校准单元。 在校准操作期间，校准单元设定AD转换补偿单元的工作特性和DA转换补偿单元的工作特性。 在校准操作期间设定的AD转换补偿单元的工作特性补偿A / D转换单元的AD转换的非线性。 在校准操作期间设置的DA转换补偿单元的工作特性补偿D / A转换单元的DA转换的非线性。
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Patent Agency Ranking
公开(公告)号：US20140253352A1
公开(公告)日：2014-09-11
申请号：US14203052
申请日：2014-03-10
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Takashi OSHIMA , Tatsuji MATSUURA , Yuichi OKUDA , Hideo NAKANE , Takaya YAMAMOTO , Keisuke KIMURA
IPC: H03M1/06
CPC classification number: H03M1/1245 , H03M1/002 , H03M1/0609 , H03M1/0639 , H03M1/1038 , H03M1/109 , H03M1/14 , H03M1/38 , H03M1/44 , H03M1/46 , H03M1/56
Abstract: A digital-correction-type A/D converter which is a charge sharing type and performing successive approximation is realized in a small area. The A/D converter is configured with an A/D conversion unit which is a charge sharing type and performing successive approximation, a digital correction unit which receives a digital output of the A/D conversion unit and performs digital correction to the digital output, and a holding unit which holds a test signal. A test signal of a common value from the holding unit is inputted into the A/D conversion unit in the first period and the second period. The A/D conversion correction coefficient for the digital correction unit is calculated on the basis of the digital correction result of the digital correction unit in the first period, and the digital correction result of the digital correction unit in the second period.
Abstract translation: 在小区域中实现了作为电荷共享型并进行逐次逼近的数字校正型A / D转换器。 A / D转换器配置有作为电荷共享型的A / D转换单元并执行逐次逼近，数字校正单元接收A / D转换单元的数字输出并对数字输出执行数字校正， 以及保持测试信号的保持单元。 来自保持单元的公共值的测试信号在第一周期和第二周期中被输入到A / D转换单元。 基于第一周期中的数字校正单元的数字校正结果和第二周期中的数字校正单元的数字校正结果来计算数字校正单元的A / D转换校正系数。
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5.发明申请SEMICONDUCTOR DEVICE HAVING ANALOG-TO-DIGITAL CONVERTER WITH GAIN-DEPENDENT DITHERING AND COMMUNICATION APPARATUS 有权具有增益依赖和通信设备的模拟数字转换器的半导体器件公开(公告)号：US20140022103A1
公开(公告)日：2014-01-23
申请号：US13940819
申请日：2013-07-12
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Keisuke KIMURA , Tatsuji MATSUURA , Yuichi OKUDA , Hideo NAKANE , Takaya YAMAMOTO
IPC: H03M1/20
CPC classification number: H03M3/49 , H03M1/201 , H03M3/328 , H03M3/332 , H03M3/43 , H03M3/438 , H03M3/486
Abstract: A semiconductor communication device reduces influence of noise that is produced by applying a dither signal. The semiconductor communication device includes a Delta-Sigma analog-to-digital converter that converts input analog signals to digital signals, a power detecting unit that detects signal power of the digital signals, a gain control unit that changes a gain setting of analog signals to be input to the Delta-Sigma analog-to-digital converter depending on the signal power of the digital signals, and a dither signal control unit that causes the Delta-Sigma analog-to-digital converter to selectively add the dither signal when the gain setting changes.
Abstract translation: 半导体通信设备减少通过应用抖动信号产生的噪声的影响。 该半导体通信装置包括将输入的模拟信号转换为数字信号的Delta-Sigma模数转换器，检测数字信号的信号功率的功率检测单元，将模拟信号的增益设定变更为 根据数字信号的信号功率输入到Delta-Sigma模数转换器;以及抖动信号控制单元，其使Delta-Sigma模数转换器在增益时选择性地添加抖动信号 设置更改。
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公开(公告)号：US20160173115A1
公开(公告)日：2016-06-16
申请号：US15051193
申请日：2016-02-23
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Yuichi OKUDA , Hideo NAKANE , Takaya YAMAMOTO , Keisuke KIMURA , Takashi OSHIMA , Tatsuji MATSUURA
CPC classification number: H03M1/1009 , G11C27/02 , H03F1/02 , H03F1/3211 , H03F3/005 , H03F3/45071 , H03F3/45475 , H03F2203/45171 , H03F2203/45544 , H03H7/004 , H03M1/002 , H03M1/124 , H03M1/38 , H03M1/44
Abstract: A differential signal is amplified by passive amplification which does not a reference of a common-mode voltage. At this time, the voltage of the differential signal is passive-amplified twice before carrying out a successive approximation type analog-digital conversion operation. The passive amplification is attained by providing a plurality of capacitances which carry out a sampling operation, and switching these connection relation by using switches. Without being accompanied by the increase of the consumed power and the chip size, an influence by the noise of s comparator is reduced to a half so that the effective resolution can be increased for one bit.
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公开(公告)号：US20150256193A1
公开(公告)日：2015-09-10
申请号：US14711733
申请日：2015-05-13
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Takashi OSHIMA , Tatsuji MATSUURA , Yuichi OKUDA , Hideo NAKANE , Takaya YAMAMOTO , Keisuke KIMURA
CPC classification number: H03M1/1245 , H03M1/002 , H03M1/0609 , H03M1/0639 , H03M1/1038 , H03M1/109 , H03M1/14 , H03M1/38 , H03M1/44 , H03M1/46 , H03M1/56
Abstract: A digital-correction-type A/D converter which is a charge sharing type and performing successive approximation is realized in a small area. The A/D converter is configured with an A/D conversion unit which is a charge sharing type and performing successive approximation, a digital correction unit which receives a digital output of the A/D conversion unit and performs digital correction to the digital output, and a holding unit which holds a test signal. A test signal of a common value from the holding unit is inputted into the A/D conversion unit in the first period and the second period. The A/D conversion correction coefficient for the digital correction unit is calculated on the basis of the digital correction result of the digital correction unit in the first period, and the digital correction result of the digital correction unit in the second period.
Abstract translation: 在小区域中实现了作为电荷共享型并进行逐次逼近的数字校正型A / D转换器。 A / D转换器配置有作为电荷共享型的A / D转换单元并执行逐次逼近，数字校正单元接收A / D转换单元的数字输出并对数字输出执行数字校正， 以及保持测试信号的保持单元。 来自保持单元的公共值的测试信号在第一周期和第二周期中被输入到A / D转换单元。 基于第一周期中的数字校正单元的数字校正结果和第二周期中的数字校正单元的数字校正结果来计算数字校正单元的A / D转换校正系数。
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公开(公告)号：US20150229322A1
公开(公告)日：2015-08-13
申请号：US14692374
申请日：2015-04-21
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Yuichi OKUDA , Hideo NAKANE , Takaya YAMAMOTO , Keisuke KIMURA , Takashi OSHIMA , Tatsuji MATSUURA
CPC classification number: H03M1/1009 , G11C27/02 , H03F1/02 , H03F1/3211 , H03F3/005 , H03F3/45071 , H03F3/45475 , H03F2203/45171 , H03F2203/45544 , H03H7/004 , H03M1/002 , H03M1/124 , H03M1/38 , H03M1/44
Abstract: A differential signal is amplified by passive amplification which does not a reference of a common-mode voltage. At this time, the voltage of the differential signal is passive-amplified twice before carrying out a successive approximation type analog-digital conversion operation. The passive amplification is attained by providing a plurality of capacitances which carry out a sampling operation, and switching these connection relation by using switches. Without being accompanied by the increase of the consumed power and the chip size, an influence by the noise of s comparator is reduced to a half so that the effective resolution can be increased for one bit.
Abstract translation: 差分信号被无源放大放大，其不是共模电压的参考。 此时，在进行逐次逼近型模拟数字转换操作之前，差分信号的电压被无源放大两次。 无源放大通过提供执行采样操作的多个电容来实现，并且通过使用开关来切换这些连接关系。 在不伴随消耗功率和芯片尺寸的增加的情况下，将比较器的噪声的影响减小到一半，使得有效分辨率可以增加一位。
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