公开(公告)号：US20140167819A1

公开(公告)日：2014-06-19

申请号：US14187030

申请日：2014-02-21

Applicant: Renesas Electronics Corporation

Inventor： Yusuke KANNO ,  Hiroyuki MIZUNO ,  Yoshihiko YASU ,  Kenji HIROSE ,  Takahiro IRITA

IPC: H03K3/037

CPC classification number: H01L27/11898 ,  G06F17/5068 ,  G06F17/5072 ,  G11C11/419 ,  H01L23/48 ,  H01L23/50 ,  H01L23/528 ,  H01L27/00 ,  H01L27/02 ,  H01L27/0203 ,  H01L27/0207 ,  H01L27/11807 ,  H01L29/7835 ,  H01L2027/11881 ,  H01L2924/0002 ,  H03K3/0315 ,  H03K3/0375 ,  H03K17/16 ,  H01L2924/00

Abstract: A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided.

Abstract translation: 一种具有控制信号系统的半导体集成电路装置，用于避免无法检查不确定信号传播防止电路的故障，以便于包括在自动化工具中的检查，以及便于芯片内的电源关闭控制。 在半导体集成电路器件中，功率关断优先级由独立电源域（A区至I区）提供。 还提供了当具有高优先级的电路被接通时，防止具有较低优先级的功率域被关断的方法。

公开(公告)号：US20180286885A1

公开(公告)日：2018-10-04

申请号：US16000967

申请日：2018-06-06

Applicant: Renesas Electronics Corporation

Inventor： Yusuke KANNO ,  Hiroyuki MIZUNO ,  Yoshihiko YASU ,  Kenji HIROSE ,  Takahiro IRITA

IPC: H01L27/118 ,  H03K3/03 ,  G11C11/419 ,  H01L23/48 ,  H01L23/50 ,  H03K17/16 ,  H03K3/037 ,  H01L27/02 ,  G06F17/50 ,  H01L23/528 ,  H01L27/00 ,  H01L29/78

CPC classification number: H01L27/11898 ,  G06F17/5068 ,  G06F17/5072 ,  G11C11/419 ,  H01L23/48 ,  H01L23/50 ,  H01L23/528 ,  H01L27/00 ,  H01L27/02 ,  H01L27/0203 ,  H01L27/0207 ,  H01L27/11807 ,  H01L29/7835 ,  H01L2027/11881 ,  H01L2924/0002 ,  H03K3/0315 ,  H03K3/0375 ,  H03K17/16 ,  H03K19/0008 ,  H03K19/00346 ,  H01L2924/00

Abstract: A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided.

公开(公告)号：US20160365358A1

公开(公告)日：2016-12-15

申请号：US15246796

申请日：2016-08-25

Applicant: Renesas Electronics Corporation

Inventor： Yusuke KANNO ,  Hiroyuki MIZUNO ,  Yoshihiko YASU ,  Kenji HIROSE ,  Takahiro IRITA

IPC: H01L27/118 ,  H03K17/16 ,  G11C11/419 ,  H03K3/03

CPC classification number: H01L27/11898 ,  G06F17/5068 ,  G06F17/5072 ,  G11C11/419 ,  H01L23/48 ,  H01L23/50 ,  H01L23/528 ,  H01L27/00 ,  H01L27/02 ,  H01L27/0203 ,  H01L27/0207 ,  H01L27/11807 ,  H01L29/7835 ,  H01L2027/11881 ,  H01L2924/0002 ,  H03K3/0315 ,  H03K3/0375 ,  H03K17/16 ,  H01L2924/00

Abstract: A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided.

公开(公告)号：US20140252495A1

公开(公告)日：2014-09-11

申请号：US14176328

申请日：2014-02-10

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Nozomu MATSUZAKI ,  Hiroyuki MIZUNO ,  Masashi HORIGUCHI

IPC: H01L27/088 ,  H01L29/423

CPC classification number: H01L21/823857 ,  B82Y99/00 ,  H01L21/82345 ,  H01L21/823462 ,  H01L21/823468 ,  H01L21/82385 ,  H01L27/088 ,  H01L27/0883 ,  H01L29/42364 ,  Y10S438/981 ,  Y10S977/936

Abstract: The semiconductor integrated circuit device employs on the same silicon substrate a plurality of kinds of MOS transistors with different magnitudes of tunnel current flowing either between the source and gate or between the drain and gate thereof. These MOS transistors include tunnel-current increased MOS transistors at least one of which is for use in constituting a main circuit of the device. The plurality of kinds of MOS transistors also include tunnel-current reduced or depleted MOS transistors at least one of which is for use with a control circuit. This control circuit is inserted between the main circuit and at least one of the two power supply units.

Abstract translation: 半导体集成电路器件在相同的硅衬底上采用具有在源极和栅极之间或其漏极和栅极之间流动的不同大小的隧道电流的多种MOS晶体管。 这些MOS晶体管包括隧道电流增加的MOS晶体管，其中至少一个用于构成器件的主电路。 多种MOS晶体管还包括隧道电流减少或耗尽的MOS晶体管，其中至少一个用于控制电路。 该控制电路插入在主电路和两个电源单元中的至少一个之间。

公开(公告)号：US20130228939A1

公开(公告)日：2013-09-05

申请号：US13865662

申请日：2013-04-18

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yusuke KANNO ,  Hiroyuki MIZUNO ,  Yoshihiko YASU ,  Kenji HIROSE ,  Takahiro IRITA

IPC: H01L23/48

CPC classification number: H01L27/11898 ,  G06F17/5068 ,  G06F17/5072 ,  G11C11/419 ,  H01L23/48 ,  H01L23/50 ,  H01L23/528 ,  H01L27/00 ,  H01L27/02 ,  H01L27/0203 ,  H01L27/0207 ,  H01L27/11807 ,  H01L29/7835 ,  H01L2027/11881 ,  H01L2924/0002 ,  H03K3/0315 ,  H03K3/0375 ,  H03K17/16 ,  H01L2924/00

Abstract: A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided.

公开(公告)号：US20200006384A1

公开(公告)日：2020-01-02

申请号：US16565765

申请日：2019-09-10

Applicant: Renesas Electronics Corporation

Inventor： Yusuke KANNO ,  Hiroyuki MIZUNO ,  Yoshihiko YASU ,  Kenji HIROSE ,  Takahiro IRITA

IPC: H01L27/118 ,  H01L23/528 ,  H01L23/50 ,  H01L23/48 ,  H03K3/03 ,  H03K3/037 ,  G11C11/419 ,  H03K17/16 ,  H01L27/02 ,  G06F17/50

Abstract: A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided.

公开(公告)号：US20150295572A1

公开(公告)日：2015-10-15

申请号：US14746920

申请日：2015-06-23

Applicant: Renesas Electronics Corporation

Inventor： Yusuke KANNO ,  Hiroyuki MIZUNO ,  Yoshihiko YASU ,  Kenji HIROSE ,  Takahiro IRITA

IPC: H03K17/16 ,  H01L27/02 ,  H01L23/528 ,  H01L23/50

CPC classification number: H01L27/11898 ,  G06F17/5068 ,  G06F17/5072 ,  G11C11/419 ,  H01L23/48 ,  H01L23/50 ,  H01L23/528 ,  H01L27/00 ,  H01L27/02 ,  H01L27/0203 ,  H01L27/0207 ,  H01L27/11807 ,  H01L29/7835 ,  H01L2027/11881 ,  H01L2924/0002 ,  H03K3/0315 ,  H03K3/0375 ,  H03K17/16 ,  H01L2924/00

Abstract: A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided.

Abstract translation: 一种具有控制信号系统的半导体集成电路装置，用于避免无法检查不确定信号传播防止电路的故障，以便于包括在自动化工具中的检查，以及便于芯片内的电源关闭控制。 在半导体集成电路器件中，功率关断优先级由独立电源域（A区至I区）提供。 还提供了当具有高优先级的电路被接通时，防止具有较低优先级的功率域被关断的方法。