公开(公告)号：US20130277635A1

公开(公告)日：2013-10-24

申请号：US13927073

申请日：2013-06-25

Applicant: Renesas Electronics Corporation

Inventor： Satoru HANZAWA ,  Fumihiko NITTA ,  Nozomu MATSUZAKI ,  Toshihiro TANAKA

IPC: H01L45/00

CPC classification number: G11C5/06 ,  G11C13/0004 ,  G11C13/003 ,  G11C13/0069 ,  G11C2213/74 ,  G11C2213/79 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/141 ,  H01L45/144

Abstract: In a semiconductor device including a memory cell array formed of memory cells using a storage element by a variable resistor and a select transistor, a buffer cell is arranged between a sense amplifier and the memory cell array and between a word driver and the memory cell array. The resistive storage element in the memory cell is connected to a bit-line via a contact formed above the resistive storage element. Meanwhile, in the buffer cell, the contact is not formed above the resistive storage element, and a state of being covered with an insulator is kept upon processing the contact in the memory cell. By such a processing method, exposure and sublimation of a chalcogenide film used in the resistive storage element can be avoided.

Abstract translation: 在包括由可变电阻器使用存储元件的存储器单元和选择晶体管形成的存储单元阵列的半导体器件中，缓冲单元布置在读出放大器和存储单元阵列之间以及字驱动器和存储单元阵列之间 。 存储单元中的电阻存储元件通过形成在电阻存储元件上方的触点连接到位线。 同时，在缓冲单元中，电阻性存储元件之上不形成接触，并且在处理存储单元中的接触时保持被绝缘体覆盖的状态。 通过这种处理方法，可以避免在电阻存储元件中使用的硫族化物膜的曝光和升华。

公开(公告)号：US20150014757A1

公开(公告)日：2015-01-15

申请号：US14504392

申请日：2014-10-01

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Fumihiko NITTA

IPC: H01L27/22 ,  H01L43/02

CPC classification number: H01L27/228 ,  B82Y10/00 ,  G11C11/14 ,  G11C11/161 ,  G11C11/1655 ,  G11C11/1659 ,  G11C11/1675 ,  H01L27/222 ,  H01L27/226 ,  H01L29/82 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12 ,  Y10S977/935

Abstract: A semiconductor device includes: a spin torque written in-plane magnetization magnetoresistive element, placed over the main surface of a semiconductor substrate, whose magnetization state can be changed according to the direction of a current flow; and a first wiring electrically coupled with the magnetoresistive element and extended toward the direction along the main surface. The aspect ratio of the magnetoresistive element as viewed in a plane is a value other than 1. In a memory cell area where multiple memory cells in which the magnetoresistive element and a switching element are electrically coupled with each other are arranged, the following measure is taken: multiple magnetoresistive elements adjoining to each other in the direction of length of each magnetoresistive element as viewed in a plane are so arranged that they are not on an identical straight line extended in the direction of length.

Abstract translation: 半导体器件包括：写入面内磁化磁阻元件的自旋转矩，放置在半导体衬底的主表面上，其磁化状态可以根据电流方向改变; 以及与磁阻元件电耦合并沿着主表面的方向延伸的第一布线。 在平面中观察的磁阻元件的纵横比是除了1以外的值。在其中布置有磁阻元件和开关元件彼此电耦合的多个存储单元的存储单元区域中，以下措施是 采取：在平面中看到的每个磁阻元件的长度方向上彼此相邻的多个磁阻元件被布置成使得它们不在长度方向上延伸的相同的直线上。

公开(公告)号：US20140241051A1

公开(公告)日：2014-08-28

申请号：US14269173

申请日：2014-05-04

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Satoru HANZAWA ,  Fumihiko NITTA ,  Nozomu MATSUZAKI ,  Toshihiro TANAKA

IPC: G11C13/00 ,  G11C5/06

CPC classification number: G11C5/06 ,  G11C13/0004 ,  G11C13/003 ,  G11C13/0069 ,  G11C2213/74 ,  G11C2213/79 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/141 ,  H01L45/144

Abstract: In a semiconductor device including a memory cell array formed of memory cells using a storage element by a variable resistor and a select transistor, a buffer cell is arranged between a sense amplifier and the memory cell array and between a word driver and the memory cell array. The resistive storage element in the memory cell is connected to a bit-line via a contact formed above the resistive storage element. Meanwhile, in the buffer cell, the contact is not formed above the resistive storage element, and a state of being covered with an insulator is kept upon processing the contact in the memory cell. By such a processing method, exposure and sublimation of a chalcogenide film used in the resistive storage element can be avoided.

Abstract translation: 在包括由可变电阻器使用存储元件的存储器单元和选择晶体管形成的存储单元阵列的半导体器件中，缓冲单元布置在读出放大器和存储单元阵列之间以及字驱动器和存储单元阵列之间 。 存储单元中的电阻存储元件通过形成在电阻存储元件上方的触点连接到位线。 同时，在缓冲单元中，电阻性存储元件之上不形成接触，并且在处理存储单元中的接触时保持被绝缘体覆盖的状态。 通过这种处理方法，可以避免在电阻存储元件中使用的硫族化物膜的曝光和升华。