公开(公告)号：US20230413185A1

公开(公告)日：2023-12-21

申请号：US18251050

申请日：2020-12-14

Applicant: QUALCOMM Incorporated

Inventor： Hao ZHANG ,  Wei HE ,  Yan WANG ,  Jian LI ,  Aimin SHANG ,  Miao FU ,  Chaofeng HUI ,  Yuankun ZHU ,  Fojian ZHANG

IPC: H04W52/22 ,  H04W52/50 ,  H04W74/08 ,  H04W36/14

CPC classification number: H04W52/228 ,  H04W36/14 ,  H04W74/0833 ,  H04W52/50

Abstract: In an aspect, a UE may determine an initial transmission power for transmission of a physical random access channel (PRACH) preamble of a PRACH procedure based upon a final PRACH preamble transmission power associated with a set of historical completed PRACH procedures. The UE may further attempt an initial transmission of the PRACH preamble based on the determined initial transmission power.

公开(公告)号：US20240022974A1

公开(公告)日：2024-01-18

申请号：US18250919

申请日：2020-12-14

Applicant: QUALCOMM Incorporated

Inventor： Hao ZHANG ,  Fojian ZHANG ,  Yi LIU ,  Xianghua CHEN ,  Wei HE ,  Yan WANG ,  Jian LI ,  Jing ZHOU

IPC: H04W36/00 ,  H04W36/14

CPC classification number: H04W36/0069 ,  H04W36/14

Abstract: Disclosed are techniques for wireless communication. In an aspect, a subscriber identity module (SIM) dual standby (DSDS) user equipment (UE) may transition a packet data session from a first radio access technology (RAT) associated with a first subscription to a second RAT associated with a second subscription, and may further transmit, over the first RAT responsive to the packet data session transition to the second RAT, one or more messages to tear down the packet data session over the first RAT.

公开(公告)号：US20200020686A1

公开(公告)日：2020-01-16

申请号：US16035387

申请日：2018-07-13

Applicant: QUALCOMM Incorporated

Inventor： Junjing BAO ,  Yan WANG ,  Jie DENG ,  Giridhar NALLAPATI

IPC: H01L27/08 ,  H01L29/94 ,  H01L29/66 ,  H01L49/02 ,  H01L23/522

Abstract: An integrated circuit (e.g., a stacked capacitor) achieves higher capacitor density without additional area consumption. The integrated circuit includes a metal-oxide-semiconductor capacitor (MOSCAP), a metal-oxide-metal capacitor (MOMCAP) and a metal-insulator-metal capacitor (MIMCAP) stacked together. The MOSCAP includes a gate and source/drain (S/D) regions. The MOMCAP is included in back-end-of-line (BEOL) layers over the MOSCAP or supported by the MOSCAP.

公开(公告)号：US20160261277A1

公开(公告)日：2016-09-08

申请号：US14639534

申请日：2015-03-05

Applicant: QUALCOMM Incorporated

Inventor： Yan WANG ,  Dinesh Jagannath ALLADI ,  Chieh-Yu HSIEH ,  Elias Hani DAGHER

IPC: H03M3/00

CPC classification number: H03M3/32 ,  H03M3/354 ,  H03M3/392 ,  H03M3/45 ,  H03M3/454 ,  H03M3/496

Abstract: A method and an apparatus for splitting a switched capacitor integrator of a delta-sigma modulator are provided. The apparatus configures a first integrator and a second integrator to be coupled in parallel to each other, switches between a first mode and a second mode, enables the first integrator to operate on an input signal to generate an output signal in the first mode, and enables the first integrator and the second integrator to cooperatively operate on the input signal in the second mode, wherein in the second mode, the apparatus generates a first output via the first integrator, generates a second output via the second integrator, and converges the first output with the second output to generate the output signal.

Abstract translation: 提供了一种用于分离Δ-Σ调制器的开关电容积分器的方法和装置。 该装置配置第一积分器和第二积分器以彼此并联耦合，在第一模式和第二模式之间切换使得第一积分器能够对输入信号进行操作，以在第一模式中产生输出信号，以及 使第一积分器和第二积分器在第二模式下对输入信号协同工作，其中在第二模式中，该装置经由第一积分器产生第一输出，经由第二积分器产生第二输出，并且收敛第一 输出与第二个输出端产生输出信号。

公开(公告)号：US20220059138A1

公开(公告)日：2022-02-24

申请号：US17000163

申请日：2020-08-21

Applicant: QUALCOMM Incorporated

Inventor： Kshitij YADAV ,  Vijayakumar DHANASEKARAN ,  Yan WANG

IPC: G11C5/14 ,  H03K19/20

Abstract: An apparatus for power supply mode switching includes a first voltage regulator to output a first voltage, a second voltage regulator to output a second voltage, a third voltage regulator to output a third voltage, an electronic load, a first switch between the first voltage regulator and the electronic load, a second switch between the second voltage regulator and the electronic load, and a third switch between the third voltage regulator and the electronic load. And, a method for power supply mode switching includes supplying power to an electronic load with a first voltage; switching to a second voltage; maintaining coupling of the electronic load with the second voltage while a voltage across the electronic load is less than a reference voltage; and switching to a third voltage when the voltage is greater than or equal to the reference voltage and the third voltage is less than the second voltage.

公开(公告)号：US20240187458A1

公开(公告)日：2024-06-06

申请号：US18553726

申请日：2021-06-07

Applicant: QUALCOMM Incorporated

Inventor： Shuhong WANG ,  Bing LENG ,  Jing ZHOU ,  Jian LI ,  Xuefeng CHEN ,  Yan WANG ,  Hao ZHANG

IPC: H04L65/1016 ,  H04L65/1069 ,  H04W76/18

CPC classification number: H04L65/1016 ,  H04L65/1069 ,  H04W76/18

Abstract: A method and apparatus improve Voice over Internet Protocol (VOIP) call setup success rate and latency. The method provides for attempting a mobile originated packet switched call, by a user equipment (UE), across a packet switched network with a transmission control protocol (TCP) connection of the Internet Protocol multimedia subsystem (IMS) session. A silent redial of the mobile originated packet switched call is performed in response to a failure of the mobile originated packet switched call, via a circuit switched network. A keep alive message is transmitted over the packet switched network after the circuit switched network call, which allows reconnection to the packet switched network.

公开(公告)号：US20180241409A1

公开(公告)日：2018-08-23

申请号：US15440612

申请日：2017-02-23

Applicant: QUALCOMM Incorporated

Inventor： Elias DAGHER ,  Yan WANG ,  Mohammad Meysam ZARGHAM ,  Dinesh Jagannath ALLADI

IPC: H03M1/12 ,  H03M3/00

CPC classification number: H03M1/1245 ,  H03M3/37 ,  H03M3/396 ,  H03M3/458 ,  H03M3/464

Abstract: Certain aspects of the present disclosure provide methods and apparatus for implementing sampling rate scaling of an excess loop delay (ELD)-compensated continuous-time delta-sigma modulator (CTDSM) analog-to-digital converter (ADC). One example ADC generally includes a loop filter; a quantizer having an input coupled to an output of the loop filter; one or more digital-to-analog converters (DACs), each having an input coupled to an output of the quantizer, an output coupled to an input of the loop filter, and a data latch comprising a clock input for the DAC coupled to a clock input for the ADC; and a clock delay circuit having an input coupled to the clock input for the ADC and an output coupled to a clock input for the quantizer.