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    PSEUDO-CML LATCH AND DIVIDER HAVING REDUCED CHARGE SHARING BETWEEN OUTPUT NODES
    1.
    发明申请
    PSEUDO-CML LATCH AND DIVIDER HAVING REDUCED CHARGE SHARING BETWEEN OUTPUT NODES 有权
    PSEUDO-CML LATCH和DIVIDER在输出节点之间具有减少的充电共享

    公开(公告)号：US20140375367A1

    公开(公告)日：2014-12-25

    申请号：US13926680

    申请日：2013-06-25

    申请人： QUALCOMM Incorporated

    发明人： Wu-Hsin Chen ,  Li Liu ,  Jianyun Hu

    IPC分类号： H03K3/017 ,  H01L21/8238

    CPC分类号： H03K3/017 ,  H01L21/823871 ,  H03K3/356121 ,  H03K3/356139

    摘要： In one example, a high-speed divider includes two identical pseudo-CML latches and four output inverters. Each latch includes a pair of cross-coupled signal holding transistors. A first P-channel pull-up circuit pulls up on a second output node QB of the latch. A second P-channel pull-up circuit pulls up on a first output node Q of the latch. A pull-down circuit involves four N-channel transistors. This pull-down circuit: 1) couples the QB node to ground when a clock signal CK is high and a data signal D is high, 2) couples the Q node to ground when CK is high and D is low, 3) prevents a transfer of charge between the QB and Q nodes through the pull-down circuit when D transitions during a time period when CK is low, and 4) decouples the QB and Q nodes from the pull-down circuit when CK is low.

    摘要翻译： 在一个示例中，高速分频器包括两个相同的伪CML锁存器和四个输出反相器。 每个锁存器包括一对交叉耦合的信号保持晶体管。 第一P沟道上拉电路在锁存器的第二输出节点QB上拉起。 第二P沟道上拉电路在锁存器的第一输出节点Q上拉起。 下拉电路包括四个N沟道晶体管。 该下拉电路：1）当时钟信号CK为高电平且数据信号D为高电平时，将QB节点耦合到地，2）当CK为高电平且D为低电平时将Q节点接地，3）防止 当CK为低电平时，D转换时，通过下拉电路在QB和Q节点之间传输电荷;以及4）当CK为低电平时，将QB和Q节点与下拉电路解耦。

    Reconfigurable receiver circuits for test signal generation
    2.
    发明授权
    Reconfigurable receiver circuits for test signal generation 有权
    用于测试信号产生的可重构接收器电路

    公开(公告)号：US08774745B2

    公开(公告)日：2014-07-08

    申请号：US13787214

    申请日：2013-03-06

    申请人： QUALCOMM Incorporated

    发明人： Kan Lai Leung ,  Chiewcharn Narathong ,  Jianyun Hu ,  Yunfei Feng

    IPC分类号： H04B17/00 ,  H01Q11/12

    CPC分类号： H04B17/21 ,  H03F3/193 ,  H03F3/72 ,  H03F2200/294 ,  H03F2200/451 ,  H04B1/1638 ,  H04B1/30 ,  H04B17/29

    摘要： Receiver circuits that can be reconfigured to generate test signals in a wireless device are disclosed. In an exemplary design, an apparatus includes a mixer and an amplifier. The mixer downconverts an input radio frequency (RF) signal based on a local oscillator (LO) signal in a first mode. The amplifier, which is formed by at least a portion of the mixer, amplifies the LO signal and provides an amplified LO signal in a second mode. In another exemplary design, an apparatus includes an amplifier and an attenuator. The amplifier receives and amplifies an input RF signal in a first mode. The attenuator, which is formed by at least a portion of the amplifier, receives and passes an LO signal in a second mode.

    摘要翻译： 公开了可以被重新配置以在无线设备中生成测试信号的接收机电路。 在示例性设计中，装置包括混频器和放大器。 混合器在第一模式中基于本地振荡器（LO）信号来降频输入射频（RF）信号。 由混频器的至少一部分形成的放大器放大LO信号，并以第二模式提供放大的LO信号。 在另一示例性设计中，装置包括放大器和衰减器。 放大器以第一模式接收并放大输入RF信号。 由放大器的至少一部分形成的衰减器在第二模式中接收和传递LO信号。

    Apparatus and method for generating an oscillating output signal
    3.
    发明授权
    Apparatus and method for generating an oscillating output signal 有权
    用于产生振荡输出信号的装置和方法

    公开(公告)号：US09331704B2

    公开(公告)日：2016-05-03

    申请号：US13757666

    申请日：2013-02-01

    申请人： QUALCOMM Incorporated

    发明人： Yiwu Tang ,  Jianyun Hu ,  Chiewcharn Narathong

    IPC分类号： H03L7/00 ,  H03L7/16 ,  H03C3/09 ,  H03B5/12 ,  H03L7/187 ,  H03L7/07 ,  H03L7/10

    CPC分类号： H03L7/16 ,  H03B5/1215 ,  H03B5/1243 ,  H03B5/1256 ,  H03B5/1296 ,  H03B2201/0208 ,  H03B2201/0216 ,  H03C3/0925 ,  H03C3/0941 ,  H03C3/0958 ,  H03L7/00 ,  H03L7/07 ,  H03L7/101 ,  H03L7/104 ,  H03L7/187

    摘要： An apparatus for generating an oscillating output signal includes an inductive-capacitive (LC) circuit and a current tuning circuit. The LC circuit includes a primary inductor and a varactor coupled to the primary inductor. A capacitance of the varactor is responsive to a voltage at a control input of the varactor. The current tuning circuit includes a secondary inductor and a current driving circuit coupled to the secondary inductor. The current driving circuit is responsive to a current at a control input of the current driving circuit. An effective inductance of the primary inductor is adjustable via magnetic coupling to the secondary inductor, and a frequency of the oscillating output signal is responsive to the effective inductance of the primary inductor and to the capacitance of the varactor.

    摘要翻译： 用于产生振荡输出信号的装置包括电感 - 电容（LC）电路和电流调谐电路。 LC电路包括耦合到初级电感器的初级电感器和变容二极管。 变容二极管的电容响应于变容二极管的控制输入端的电压。 当前调谐电路包括二次电感器和耦合到次级电感器的电流驱动电路。 电流驱动电路响应于电流驱动电路的控制输入处的电流。 初级电感器的有效电感可通过与次级电感器的磁耦合进行调节，振荡输出信号的频率响应于初级电感器的有效电感和变容二极管的电容。

    Reconfigurable receiver circuits for test signal generation
    4.
    发明授权
    Reconfigurable receiver circuits for test signal generation 有权
    用于测试信号产生的可重构接收器电路

    公开(公告)号：US09130666B2

    公开(公告)日：2015-09-08

    申请号：US14303552

    申请日：2014-06-12

    申请人： QUALCOMM Incorporated

    发明人： Lai Kan Leung ,  Chiewcharn Narathong ,  Jianyun Hu ,  Yunfei Feng

    IPC分类号： H04B1/06 ,  H04B17/00 ,  H04B17/21 ,  H04B17/29 ,  H04B1/16

    CPC分类号： H04B17/21 ,  H03F3/193 ,  H03F3/72 ,  H03F2200/294 ,  H03F2200/451 ,  H04B1/1638 ,  H04B1/30 ,  H04B17/29

    摘要： Receiver circuits that can be reconfigured to generate test signals in a wireless device are disclosed. In an exemplary design, an apparatus includes a mixer and an amplifier. The mixer downconverts an input radio frequency (RF) signal based on a local oscillator (LO) signal in a first mode. The amplifier, which is formed by at least a portion of the mixer, amplifies the LO signal and provides an amplified LO signal in a second mode. In another exemplary design, an apparatus includes an amplifier and an attenuator. The amplifier receives and amplifies an input RF signal in a first mode. The attenuator, which is formed by at least a portion of the amplifier, receives and passes an LO signal in a second mode.

    摘要翻译： 公开了可以被重新配置以在无线设备中生成测试信号的接收机电路。 在示例性设计中，装置包括混频器和放大器。 混合器在第一模式中基于本地振荡器（LO）信号来降频输入射频（RF）信号。 由混频器的至少一部分形成的放大器放大LO信号，并以第二模式提供放大的LO信号。 在另一示例性设计中，装置包括放大器和衰减器。 放大器以第一模式接收并放大输入RF信号。 由放大器的至少一部分形成的衰减器在第二模式中接收和传递LO信号。

    RECONFIGURABLE RECEIVER CIRCUITS FOR TEST SIGNAL GENERATION
    5.
    发明申请
    RECONFIGURABLE RECEIVER CIRCUITS FOR TEST SIGNAL GENERATION 有权
    用于测试信号产生的可重构接收器电路

    公开(公告)号：US20140162580A1

    公开(公告)日：2014-06-12

    申请号：US13787214

    申请日：2013-03-06

    申请人： QUALCOMM INCORPORATED

    发明人： Kan Lai Leung ,  Chiewcharn Narathong ,  Jianyun Hu ,  Yunfei Feng

    IPC分类号： H04B1/16

    CPC分类号： H04B17/21 ,  H03F3/193 ,  H03F3/72 ,  H03F2200/294 ,  H03F2200/451 ,  H04B1/1638 ,  H04B1/30 ,  H04B17/29

    摘要： Receiver circuits that can be reconfigured to generate test signals in a wireless device are disclosed. In an exemplary design, an apparatus includes a mixer and an amplifier. The mixer downconverts an input radio frequency (RF) signal based on a local oscillator (LO) signal in a first mode. The amplifier, which is formed by at least a portion of the mixer, amplifies the LO signal and provides an amplified LO signal in a second mode. In another exemplary design, an apparatus includes an amplifier and an attenuator. The amplifier receives and amplifies an input RF signal in a first mode. The attenuator, which is formed by at least a portion of the amplifier, receives and passes an LO signal in a second mode.

    摘要翻译： 公开了可以被重新配置以在无线设备中生成测试信号的接收机电路。 在示例性设计中，装置包括混频器和放大器。 混合器在第一模式中基于本地振荡器（LO）信号来降频输入射频（RF）信号。 由混频器的至少一部分形成的放大器放大LO信号，并以第二模式提供放大的LO信号。 在另一示例性设计中，装置包括放大器和衰减器。 放大器以第一模式接收并放大输入RF信号。 由放大器的至少一部分形成的衰减器在第二模式中接收和传递LO信号。

    Pseudo-CML latch and divider having reduced charge sharing between output nodes
    7.
    发明授权
    Pseudo-CML latch and divider having reduced charge sharing between output nodes 有权
    伪CML锁存器和分压器具有降低的输出节点之间的电荷共享

    公开(公告)号：US09059686B2

    公开(公告)日：2015-06-16

    申请号：US13926680

    申请日：2013-06-25

    申请人： QUALCOMM Incorporated

    发明人： Wu-Hsin Chen ,  Li Liu ,  Jianyun Hu

    IPC分类号： H03K3/00 ,  H03K3/027 ,  H03K3/037 ,  H03K3/017 ,  H01L21/8238 ,  H03K3/356

    CPC分类号： H03K3/017 ,  H01L21/823871 ,  H03K3/356121 ,  H03K3/356139

    摘要： In one example, a high-speed divider includes two identical pseudo-CML latches and four output inverters. Each latch includes a pair of cross-coupled signal holding transistors. A first P-channel pull-up circuit pulls up on a second output node QB of the latch. A second P-channel pull-up circuit pulls up on a first output node Q of the latch. A pull-down circuit involves four N-channel transistors. This pull-down circuit: 1) couples the QB node to ground when a clock signal CK is high and a data signal D is high, 2) couples the Q node to ground when CK is high and D is low, 3) prevents a transfer of charge between the QB and Q nodes through the pull-down circuit when D transitions during a time period when CK is low, and 4) decouples the QB and Q nodes from the pull-down circuit when CK is low.

    摘要翻译： 在一个示例中，高速分频器包括两个相同的伪CML锁存器和四个输出反相器。 每个锁存器包括一对交叉耦合的信号保持晶体管。 第一P沟道上拉电路在锁存器的第二输出节点QB上拉起。 第二P沟道上拉电路在锁存器的第一输出节点Q上拉起。 下拉电路包括四个N沟道晶体管。 该下拉电路：1）当时钟信号CK为高电平且数据信号D为高电平时，将QB节点耦合到地，2）当CK为高电平且D为低电平时将Q节点接地，3）防止 当CK为低电平时，D转换时，通过下拉电路在QB和Q节点之间传输电荷;以及4）当CK为低电平时，将QB和Q节点与下拉电路解耦。

    APPARATUS AND METHOD FOR GENERATING AN OSCILLATING OUTPUT SIGNAL
    9.
    发明申请
    APPARATUS AND METHOD FOR GENERATING AN OSCILLATING OUTPUT SIGNAL 有权
    用于产生振荡输出信号的装置和方法

    公开(公告)号：US20140218124A1

    公开(公告)日：2014-08-07

    申请号：US13757666

    申请日：2013-02-01

    申请人： QUALCOMM INCORPORATED

    发明人： Yiwu Tang ,  Jianyun Hu ,  Chiewcharn Narathong

    IPC分类号： H03L7/16

    CPC分类号： H03L7/16 ,  H03B5/1215 ,  H03B5/1243 ,  H03B5/1256 ,  H03B5/1296 ,  H03B2201/0208 ,  H03B2201/0216 ,  H03C3/0925 ,  H03C3/0941 ,  H03C3/0958 ,  H03L7/00 ,  H03L7/07 ,  H03L7/101 ,  H03L7/104 ,  H03L7/187

    摘要： An apparatus for generating an oscillating output signal includes an inductive-capacitive (LC) circuit and a current tuning circuit. The LC circuit includes a primary inductor and a varactor coupled to the primary inductor. A capacitance of the varactor is responsive to a voltage at a control input of the varactor. The current tuning circuit includes a secondary inductor and a current driving circuit coupled to the secondary inductor. The current driving circuit is responsive to a current at a control input of the current driving circuit. An effective inductance of the primary inductor is adjustable via magnetic coupling to the secondary inductor, and a frequency of the oscillating output signal is responsive to the effective inductance of the primary inductor and to the capacitance of the varactor.

    摘要翻译： 用于产生振荡输出信号的装置包括电感 - 电容（LC）电路和电流调谐电路。 LC电路包括耦合到初级电感器的初级电感器和变容二极管。 变容二极管的电容响应于变容二极管的控制输入端的电压。 当前调谐电路包括二次电感器和耦合到次级电感器的电流驱动电路。 电流驱动电路响应于电流驱动电路的控制输入处的电流。 初级电感器的有效电感可通过与次级电感器的磁耦合进行调节，振荡输出信号的频率响应于初级电感器的有效电感和变容二极管的电容。