-
公开(公告)号：US11200866B1
公开(公告)日：2021-12-14
申请号：US17176767
申请日：2021-02-16
Applicant: QUALCOMM Incorporated
Inventor： Dileep Marchya , Sudeep Ravi Kottilingal , Srinivas Pullakavi , Dhaval Kanubhai Patel , Prashant Nukala , Nagamalleswararao Ganji , Mohammed Naseer Ahmed , Mahesh Aia , Kalyan Thota , Sushil Chauhan
Abstract: In some aspects, the present disclosure provides a method for generating a frame. The method includes receiving a first fence indicating that a first frame stored in a display processor unit (DPU) buffer has been consumed by a hardware component. The method also includes in response to receiving the first fence, fetching a plurality of layers from an application buffer, the plurality of layers corresponding to a second frame. The method also includes determining to use both a DPU and a graphics processing unit (GPU) to process the plurality of layers for composition of the second frame. The method also includes fetching the first fence from the DPU buffer and generating a second fence.
-
公开(公告)号：US20210183007A1
公开(公告)日：2021-06-17
申请号：US16714019
申请日：2019-12-13
Applicant: QUALCOMM Incorporated
Inventor： Dileep Marchya , Dhaval Kanubhai Patel , Gopikrishnaiah Andandan
Abstract: Methods, systems, and devices for image processing are described. A device may determine one or more static layers of a layer stack and one or more updating layers of the layer stack. The device may determine an order of the one or more static layers, or the one or more updating layers, or both in the layer stack. In some examples, the device may modify the order in the layer stack by positioning the one or more static layers below the one or more updating layers in the layer stack. Each static layer of the one or more static layers may be associated with a first blending equation and each updating layer of the one or more updating layers may be associated with a second blending equation. As a result, the device may process the layer stack based on the modified order.
-
公开(公告)号：US09953620B2
公开(公告)日：2018-04-24
申请号：US14852273
申请日：2015-09-11
Applicant: QUALCOMM Incorporated
IPC: G06F3/0485 , G09G5/34 , G09G5/393 , G06T1/60
CPC classification number: G09G5/393 , G06F3/0485 , G06T1/60 , G09G5/34 , G09G2320/103 , G09G2360/127
Abstract: Techniques are described for determining a region to be updated in a frame based on positional changes of one layer from frame-to-frame. The positional changes may be displacement of a layer or removal of a layer from one frame to the next. In addition to the information of the positional changes, the techniques also utilize all areas for which the image content changed, but the position did not, for determining the region to be updated.
-
公开(公告)号：US11705091B2
公开(公告)日：2023-07-18
申请号：US17449630
申请日：2021-09-30
Applicant: QUALCOMM Incorporated
Inventor： Sushil Chauhan , Mahesh Aia , Dileep Marchya
CPC classification number: G09G5/377 , G06T1/20 , G09G2360/18
Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for parallelization of GPU composition with DPU topology selection. A processor may receive an indication of a plurality of application layers for composition at a first processor (e.g., a DPU) and a second processor (e.g., a GPU). The processor may select one or more first application layers of the plurality of application layers for attempted composition at the first processor and one or more second application layers of the plurality of application layers for composition at the second processor. The processor may transmit each of the one or more first application layers to the first processor for composition and each of the one or more second application layers to the second processor for composition.
-
公开(公告)号：US10789913B2
公开(公告)日：2020-09-29
申请号：US15862227
申请日：2018-01-04
Applicant: QUALCOMM Incorporated
Inventor： Rajesh Yadav , Dileep Marchya
Abstract: Techniques of this disclosure may include ways to control the amount of graphics data a graphics processing unit (GPU) renders. The GPU may render graphics data for image content that changed from frame-to-frame rather than graphics data for image content that changed and did not change. To display the image content, processing circuitry may map locations of where the graphics data is stored to lines in the image content allowing for the GPU to store the graphics data in arbitrary locations of an application buffer.
-
Patent Agency Ranking
公开(公告)号：US20200226964A1
公开(公告)日：2020-07-16
申请号：US16247920
申请日：2019-01-15
Applicant: QUALCOMM Incorporated
Inventor： Dileep Marchya , Dhaval Kanubhai Patel , Gopikrishnaiah Andandan
Abstract: An improved method and system for power-efficient display are provided. Burst mode display processing allows a host processor to compose and render multiple low-resolution frames in a computation cycle. The low-resolution frames are transferred to a display panel, and the host processor enters a power-saving mode and minimizes power consumption while the frames are being displayed. In one embodiment, the host processor drives frame switches at the display panel while in a power-saving mode. In another embodiment, the display panel drives frame switches itself with no further input from the host processor.
-
公开(公告)号：US20200059643A1
公开(公告)日：2020-02-20
申请号：US16104488
申请日：2018-08-17
Applicant: QUALCOMM Incorporated
Inventor： Dileep Marchya , Dhaval Kanubhai Patel , Gopikrishnaiah Andandan
IPC: H04N19/107 , H04N19/50 , H04N19/172 , H04N19/182 , H04N19/176
Abstract: Methods, systems, and devices for processing display data are described. A device may receive a bitstream sequence including a quantity of intra-coded frames, inter-coded frames, or bi-directional frames, or a combination thereof. In some examples, the device may be a decoding device or an encoding device. Upon receiving the bitstream sequence, the device may determine a refresh pixel region for a frame based on an order of the quantity of intra-coded frames, inter-coded frames, or bi-directional frames, or a combination thereof. In some examples, the order may be an encoding order of the intra-coded frames, inter-coded frames, or bi-directional frames, or a combination thereof. The device may then send the refresh pixel region for the frame to a display device based on determining the refresh pixel region for the frame.
-
公开(公告)号：US20190311668A1
公开(公告)日：2019-10-10
申请号：US15948671
申请日：2018-04-09
Applicant: QUALCOMM Incorporated
Inventor： Dileep Marchya , Srinivas Pullakavi
IPC: G09G3/20
Abstract: A display panel of a device may receive, from a host processor of the device, an inline pixel operation instruction comprising an indication of a first linear adjustment for a set of source pixel values for a display region of the display. The display panel may generate a pixel pattern for the display region by applying the first linear adjustment to the set of source pixel values and display the pixel pattern on the display. The display panel may in some cases read the set of source pixel values from a frame buffer of the device. The display panel may in some cases determine a color component tuple for each pixel of the display region based at least in part on the indication of the first linear adjustment, wherein the pixel pattern for the display region is based at least in part on the color component tuple.
-
公开(公告)号：US09883137B2
公开(公告)日：2018-01-30
申请号：US14931358
申请日：2015-11-03
Applicant: QUALCOMM Incorporated
Abstract: Techniques are described in which a video decoding mode is used to determine which regions of a picture need to be composed. If a region of a current picture is decoded in skip mode with the reference picture of the skip mode being a previous picture that is displayed immediately prior to the current picture, then pixel values for that region may not need to be retrieved from system memory.
-
公开(公告)号：US11151965B2
公开(公告)日：2021-10-19
申请号：US16548587
申请日：2019-08-22
Applicant: QUALCOMM Incorporated
Inventor： Dileep Marchya , Srinivas Pullakavi , Prashant Nukala
Abstract: The present disclosure relates to methods and apparatus for display processing. Aspects of the present disclosure can determine a refresh offset for at least one group of lines in a first display based on at least one group of lines in a second display. Aspects of the present disclosure can also apply the refresh offset for the at least one group of lines in the first display based on the at least one group of lines in the second display. Further, aspects of the present disclosure can adjust combined instantaneous bandwidth corresponding to each of the at least one group of lines in the first display and each of the at least one group of lines in the second display based on the applied refresh offset. Aspects of the present disclosure can also determine one or more overlapping layer regions based on the first display and the second display.
-
-
-
-
-
-
-
-
-
Search Results
27
records
(took 0.025 seconds)
