公开(公告)号：US09612281B2

公开(公告)日：2017-04-04

申请号：US14549063

申请日：2014-11-20

Applicant: QUALCOMM Incorporated

Inventor： Yi Lou ,  Ardavan Moassessi ,  Paul Ivan Penzes ,  David Anthony Kidd

IPC: H03K3/00 ,  G01R31/3177 ,  G01R31/317 ,  G01R31/3185 ,  H03K3/037 ,  H03K3/3562

CPC classification number: G01R31/3177 ,  G01R31/31725 ,  G01R31/31727 ,  G01R31/318541 ,  G01R31/318552 ,  G01R31/318594 ,  H03K3/0375 ,  H03K3/35625

Abstract: A flip-flop is provided that includes a master latch clocked according to a first delay during a normal mode of operation and clocked by a smaller second delay during a scan mode of operation.

公开(公告)号：US20190107569A1

公开(公告)日：2019-04-11

申请号：US15730486

申请日：2017-10-11

Applicant: QUALCOMM Incorporated

Inventor： David Kidd ,  Ardavan Moassessi ,  Angelo Pinto ,  Albert Kumar ,  Yi Lou ,  Bipin Duggal ,  Amar Gulhane ,  Michael Bourland ,  Mustafa Badaroglu ,  Paul Penzes

IPC: G01R31/02 ,  G01R31/28 ,  G01R31/36 ,  H01L21/66

Abstract: Aspects of the disclosure includes a transistor-under-test (TUT) to charge/discharge a capacitor; changing an oscillation state when a capacitor voltage crosses a threshold and turning OFF the TUT; discharging the capacitor using the TUT; commencing precharging the capacitor after detecting the capacitor reaches a transition voltage; commencing discharging the capacitor after a precharger time delay; sustaining a relaxation oscillator waveform, wherein the relaxation oscillator waveform is based on turning OFF/ON the TUT; and generating a digital representation of a TUT current associated with a relaxation oscillator period of the relaxation oscillator waveform. For example, a measurement tile includes a pulse generator to sustain the relaxation oscillator waveform with the relaxation oscillator period associated with an inverse TUT current; and a precharger charging a capacitor and the TUT charging/discharging the capacitor, wherein the relaxation oscillator waveform is based on turning OFF/ON the TUT in accordance with discharging and charging the capacitor.

公开(公告)号：US20160146887A1

公开(公告)日：2016-05-26

申请号：US14549063

申请日：2014-11-20

Applicant: QUALCOMM Incorporated

Inventor： Yi Lou ,  Ardavan Moassessi ,  Paul Ivan Penzes ,  David Anthony Kidd

IPC: G01R31/3177 ,  G01R31/317

CPC classification number: G01R31/3177 ,  G01R31/31725 ,  G01R31/31727 ,  G01R31/318541 ,  G01R31/318552 ,  G01R31/318594 ,  H03K3/0375 ,  H03K3/35625

Abstract: A flip-flop is provided that includes a master latch clocked according to a first delay during a normal mode of operation and clocked by a smaller second delay during a scan mode of operation.

Abstract translation: 提供了一种触发器，其包括在正常操作模式期间按照第一延迟时钟的主锁存器，并且在扫描操作模式期间由较小的第二延迟计时。