Abstract:
Various dynamic voltage and frequency scaling (DVFS) techniques can optimize the high voltage residency of a device containing multiple processing cores that share a voltage rail. The DVFS techniques described herein can reduce the high voltage residency (duration) of the voltage rail by aligning the high frequency duration of multiple cores sharing the same voltage rail.
Abstract:
Systems, methods, and computer-readable media are provided for camera dynamic voting to optimize fast sensor mode power. In some examples, a computing device can obtain, based on performing dynamic voting, a plurality of votes associated with a plurality of components sharing a power source. The computing device can determine a voting result based on the plurality of votes. The computing device can increase or decreasing a clock rate and a voltage for the power source based on the voting result to produce an updated clock rate and an updated voltage. The computing device can then apply the updated clock rate and the updated voltage to an image processor.
Abstract:
Systems and methods for external access detection and recovery in a subsystem of a system-on-a-chip (SoC) in a portable computing device (PCD) are presented. In operation, a subsystem of the SoC is operated in an internal mode independently of the SoC while the SoC is in a low power state, such as a non-functional or zero power state or mode. The subsystem comprises a processor in communication with a memory, a sensor, and a monitor module. The monitor module detects when the processor of the subsystem requests access to a component external to the subsystem. In response to this detected request, the SoC is caused to enter into a full power state or mode, and the subsystem is caused to exit the internal mode of operation.