公开(公告)号：US12093096B2

公开(公告)日：2024-09-17

申请号：US18082518

申请日：2022-12-15

Applicant: QUALCOMM Incorporated

Inventor： Aravind Bhaskara ,  Zhurang Zhao ,  Kiran Bhagwat ,  Michael Tipton ,  Joshua Stubbs ,  Jyotirmoy Das ,  Thomas Tang

IPC: G06F1/00 ,  G06F1/08 ,  G06F1/26 ,  G06F1/3203

CPC classification number: G06F1/26 ,  G06F1/08 ,  G06F1/3203

Abstract: Various dynamic voltage and frequency scaling (DVFS) techniques can optimize the high voltage residency of a device containing multiple processing cores that share a voltage rail. The DVFS techniques described herein can reduce the high voltage residency (duration) of the voltage rail by aligning the high frequency duration of multiple cores sharing the same voltage rail.

公开(公告)号：US12250454B2

公开(公告)日：2025-03-11

申请号：US18165189

申请日：2023-02-06

Applicant: QUALCOMM Incorporated

Inventor： Aravind Bhaskara ,  Tauseef Kazi ,  Zhurang Zhao ,  Rohan Desai ,  Michael Tipton ,  Joshua Stubbs ,  Kiran Bhagwat ,  Pavan Kumar Chilamkurthi

IPC: H04N23/65 ,  H04N25/71

Abstract: Systems, methods, and computer-readable media are provided for camera dynamic voting to optimize fast sensor mode power. In some examples, a computing device can obtain, based on performing dynamic voting, a plurality of votes associated with a plurality of components sharing a power source. The computing device can determine a voting result based on the plurality of votes. The computing device can increase or decreasing a clock rate and a voltage for the power source based on the voting result to produce an updated clock rate and an updated voltage. The computing device can then apply the updated clock rate and the updated voltage to an image processor.