Abstract:
A device includes an adjustable capacitance and a switchable inductance coupled to the adjustable capacitance and configured as a tunable resonant circuit, the switchable inductance comprising a tapped structure having a first inductance and a second inductance.
Abstract:
An apparatus is described. The apparatus includes an input device. The apparatus also includes a positive supply voltage pad. The apparatus further includes an input signal pad. The apparatus also includes a ground pad. The apparatus further includes charged-device model protection circuitry that protects the input device from electrostatic discharge. The charged-device model protection circuitry includes at least one of de-Q circuitry and a cascode device.
Abstract:
A device includes an adjustable capacitance and a switchable inductance coupled to the adjustable capacitance and configured as a tunable resonant circuit, the switchable inductance comprising a tapped structure having a first inductance and a second inductance.
Abstract:
Amplifiers with shunt switches to mitigate interference are disclosed. In an exemplary design, an apparatus includes an amplifier and a shunt switch. The amplifier has an input operatively coupled to an input/output (I/O) pad of an integrated circuit (IC) chip. The shunt switch grounds the amplifier when the shunt switch is closed. The shunt switch is isolated from the I/O pad and the amplifier input. The amplifier may be a low noise amplifier (LNA) or some other type of amplifier. In an exemplary design, the shunt switch is isolated from the I/O pad by a series switch. The series switch and the shunt switch may be closed when the amplifier is disabled and may be opened when the amplifier is enabled.
Abstract:
An apparatus is described. The apparatus includes an input device. The apparatus also includes a positive supply voltage pad. The apparatus further includes an input signal pad. The apparatus also includes a ground pad. The apparatus further includes charged-device model protection circuitry that protects the input device from electrostatic discharge. The charged-device model protection circuitry includes at least one of de-Q circuitry and a cascode device.
Abstract:
Exemplary embodiments are directed to providing electrostatic discharge (ESD) protection of a cascode device of an amplifier. In an exemplary embodiment, a transistor is configured to receive a bias voltage and at least one circuit element coupled to the transistor and configured to receive an input voltage via an input pad. Additionally at least one diode can be coupled to a drain of the first transistor and configured to limit a voltage potential at an internal node of the amplifier caused by the input pad.
Abstract:
Exemplary embodiments are directed to providing electrostatic discharge (ESD) protection of a cascode device of an amplifier. In an exemplary embodiment, a transistor is configured to receive a bias voltage and at least one circuit element coupled to the transistor and configured to receive an input voltage via an input pad. Additionally at least one diode can be coupled to a drain of the first transistor and configured to limit a voltage potential at an internal node of the amplifier caused by the input pad.
Abstract:
Bias voltage generators that can generate variable bias voltages for transistors in mixers and other circuits are disclosed. In an exemplary design, an apparatus (e.g., a wireless device or an integrated circuit (IC)) includes at least one transistor and a bias voltage generator. The transistor(s) have a threshold voltage and receive a bias voltage. The bias voltage generator generates the bias voltage based on changes to the threshold voltage of the transistor(s), e.g., due to IC process and/or temperature. In an exemplary design, the bias voltage generator includes a replica transistor that tracks the transistor(s) and an op-amp that provides a gate voltage for the replica transistor. The bias voltage is generated based on the gate voltage. The bias voltage generator may generate the bias voltage (i) to track the threshold voltage of the transistor(s) in a first mode or (ii) based on a fixed voltage in a second mode.
Abstract:
An apparatus is described. The apparatus includes an input device. The apparatus also includes a positive supply voltage pad. The apparatus further includes an input signal pad. The apparatus also includes a ground pad. The apparatus further includes charged-device model protection circuitry that protects the input device from electrostatic discharge. The charged-device model protection circuitry includes at least one of de-Q circuitry and a cascode device.
Abstract:
An apparatus is described. The apparatus includes an input device. The apparatus also includes a positive supply voltage pad. The apparatus further includes an input signal pad. The apparatus also includes a ground pad. The apparatus further includes charged-device model protection circuitry that protects the input device from electrostatic discharge. The charged-device model protection circuitry includes at least one of de-Q circuitry and a cascode device.