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    RADIO FREQUENCY FRONT END (RFFE) COMMAND CODE EXTENSION WITH UNIFORM SEQUENCE START CONDITION (SSC)
    3.
    发明申请
    RADIO FREQUENCY FRONT END (RFFE) COMMAND CODE EXTENSION WITH UNIFORM SEQUENCE START CONDITION (SSC) 审中-公开

    公开(公告)号：US20180074985A1

    公开(公告)日：2018-03-15

    申请号：US15696567

    申请日：2017-09-06

    Applicant: QUALCOMM Incorporated

    Inventor： Lalan Jee Mishra ,  Helena Deirdre O'Shea ,  Richard Dominic Wietfeldt

    IPC: G06F13/362 ,  G06F13/42

    CPC classification number: G06F13/362 ,  G06F13/4247 ,  H04L12/40013 ,  H04W84/20

    Abstract: Radio Frequency Front End (RFFE) command code extensions with uniform start sequence condition (SSC) are disclosed. In one aspect, the RFFE protocol reserves one of the remaining reserved command codes as a command code extension command. In a first aspect, use of the command code extension command allows insertion of another command field after an existing command code and before a payload. The command code extension command may include the ability to nest plural command code extension commands providing multiple layers of commands so as to provide necessary and sufficient unused codes for future needs. In a second aspect, the command code extension command may allow a designation of a particular subset of commands to be associated with the command codes in the new command code field. In this aspect, command codes are reused with potentially different meanings based on which subset of commands was indicated.

    TRIPLE-DATA-RATE TECHNIQUE FOR A SYNCHRONOUS LINK
    4.
    发明申请
    TRIPLE-DATA-RATE TECHNIQUE FOR A SYNCHRONOUS LINK 审中-公开

    公开(公告)号：US20180039598A1

    公开(公告)日：2018-02-08

    申请号：US15226113

    申请日：2016-08-02

    Applicant: QUALCOMM Incorporated

    Inventor： Lalan Jee Mishra ,  Richard Dominic Wietfeldt ,  Helena Deirdre O'Shea

    IPC: G06F13/42 ,  G06F13/364

    Abstract: Systems, methods, and apparatus for transmitting additional information over a synchronous serial bus are described. A method performed at a transmitting device coupled to the serial bus includes providing first data in a data signal to be transmitted on a first wire of a multi-wire serial bus, providing a series of pulses in a clock signal to be transmitted on a second wire of a multi-wire serial bus, where each pulse has a rising edge and a falling edge, each edge being aligned with a different bit of the first data. The method may include encoding second data in the clock signal by controlling a duration of each pulse in the series of pulses based on a value of one or more bits of the second data, and transmitting the data signal and the clock signal over the serial bus.

    FULL-MASK PARTIAL-BIT-FIELD (FM-PBF) TECHNIQUE FOR LATENCY SENSITIVE MASKED-WRITE
    5.
    发明申请
    FULL-MASK PARTIAL-BIT-FIELD (FM-PBF) TECHNIQUE FOR LATENCY SENSITIVE MASKED-WRITE 有权

    公开(公告)号：US20170147521A1

    公开(公告)日：2017-05-25

    申请号：US15346602

    申请日：2016-11-08

    Applicant: QUALCOMM Incorporated

    Inventor： Lalan Jee Mishra ,  Richard Wietfeldt ,  Helena Deirdre O'Shea

    IPC: G06F13/362 ,  G06F9/30

    CPC classification number: G06F13/362 ,  G06F9/30101 ,  G06F13/38

    Abstract: Systems, methods, and apparatus for data communication are provided. An apparatus maybe configured to generate a mask field in a packet to be transmitted through an interface to a slave device, the mask field having a first number of bits, provide a control-bit field in the packet, the control-bit field having a second number of bits, where the second number of bits is less than the first number of bits, and transmit the packet through the interface. The packet may be addressed to a control register of the slave device. The control register may have the first number of bits. Each bit in the control-bit field may correspond to a bit of the control register that is identified by the mask field.

    On-chip clock generator calibration
    7.
    发明授权
    On-chip clock generator calibration 有权

    公开(公告)号：US10705557B2

    公开(公告)日：2020-07-07

    申请号：US15942191

    申请日：2018-03-30

    Applicant: QUALCOMM Incorporated

    Inventor： ZhenQi Chen ,  Jianguo Yao ,  Scott Davenport ,  Helena Deirdre O'Shea ,  Reza Mohammadpourrad

    IPC: G06F1/00 ,  G06F1/04

    Abstract: Systems, methods, and apparatus for internal on-chip clock calibration for devices coupled to a serial bus are described. A data line of the bus is monitored at a device in order to detect select command signals on the data line, where the select command signals have an accompanying clock signal, such as a burst clock, on a clock line of the serial bus sent concurrently with the command signal. The internal on-chip clock generator in the receiving device utilizes the clock signal occurring with the command signal for calibration, where the select signals are those signals sufficiently long enough for a receiving device to effectively utilize the concurrent clock signal for calibration purposes. In this manner, clock calibration for an internal clock is maintained accurately without the need for an extra clock calibration input.

    DYNAMIC POWER MANAGEMENT CONTROL
    9.
    发明申请
    DYNAMIC POWER MANAGEMENT CONTROL 有权
    动态电源管理控制

    公开(公告)号：US20140228079A1

    公开(公告)日：2014-08-14

    申请号：US13764350

    申请日：2013-02-11

    Applicant: QUALCOMM INCORPORATED

    Inventor： Hardik M Patel ,  Todd R Sutton ,  Frederic Bossu ,  Chris M Rosolowski ,  Helena Deirdre O'Shea

    IPC: H04W52/02

    CPC classification number: H04W52/0225 ,  H04W52/0245 ,  Y02D70/00

    Abstract: Exemplary embodiments are related to enhancing power efficiency of an electronic device. A device may include a power management module and a radio-frequency (RF) module coupled to the power management module. The device may further include a digital module coupled to each of the power management module and the RF module and configured to dynamically adjust at least one setting of the power management module based on one or more RF conditions.

    Abstract translation: 示例性实施例涉及提高电子设备的功率效率。 设备可以包括耦合到电源管理模块的电源管理模块和射频（RF）模块。 该设备还可以包括耦合到每个电源管理模块和RF模块的数字模块，并且被配置为基于一个或多个RF条件来动态地调整功率管理模块的至少一个设置。

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