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    PICTURE ORDER COUNT RESET FOR MULTI-LAYER CODECS
    2.
    发明申请
    PICTURE ORDER COUNT RESET FOR MULTI-LAYER CODECS 审中-公开
    多层编码器的图片顺序复位

    公开(公告)号：US20150373338A1

    公开(公告)日：2015-12-24

    申请号：US14741304

    申请日：2015-06-16

    Applicant: QUALCOMM Incorporated

    Inventor： Fnu HENDRY ,  Adarsh Krishnan RAMASUBRAMONIAN ,  Ye-Kui WANG

    IPC: H04N19/172 ,  H04N19/105 ,  H04N19/31 ,  H04N19/33 ,  H04N13/00 ,  H04N19/52 ,  H04N19/58 ,  H04N19/577 ,  H04N19/597 ,  H04N19/159 ,  H04N19/503

    CPC classification number: H04N19/187 ,  H04N13/161 ,  H04N19/107 ,  H04N19/157 ,  H04N19/30 ,  H04N19/31 ,  H04N19/33 ,  H04N19/46 ,  H04N19/70 ,  H04W84/042 ,  H04W88/02

    Abstract: An apparatus for coding video information according to certain aspects includes a memory unit configured to store video information associated with a plurality of layers and a processor. The processor is configured to obtain information associated with a current access unit (AU) to be coded, the current AU containing pictures from one or more layers of the plurality of layers. The processor is further configured to determine whether the current AU includes a first layer containing an intra random access point (IRAP) picture. The process is additionally configured to reset a picture order count (POC) of the second layer at the current AU, in response to determining that the current AU includes (1) a first layer that contains an IRAP picture and (2) a second layer containing no picture or containing a discardable picture.

    Abstract translation: 根据某些方面的用于对视频信息进行编码的装置包括被配置为存储与多个层相关联的视频信息的存储器单元和处理器。 处理器被配置为获得与要编码的当前访问单元（AU）相关联的信息，当前AU包含来自所述多个层中的一个或多个层的图片。 处理器还被配置为确定当前AU是否包括包含内部随机接入点（IRAP）图像的第一层。 该过程另外被配置为响应于确定当前AU包括（1）包含IRAP图像的第一层和（2）第二层来重置当前AU处的第二层的图像顺序计数（POC） 不包含图片或包含可丢弃的图片。

    POSITION DEPENDENT INTRA PREDICTION COMBINATION WITH MULTIPLE REFERENCE LINES FOR INTRA PREDICTION
    4.
    发明申请
    POSITION DEPENDENT INTRA PREDICTION COMBINATION WITH MULTIPLE REFERENCE LINES FOR INTRA PREDICTION 审中-公开

    公开(公告)号：US20200007870A1

    公开(公告)日：2020-01-02

    申请号：US16434113

    申请日：2019-06-06

    Applicant: QUALCOMM Incorporated

    Inventor： Adarsh Krishnan RAMASUBRAMONIAN ,  Geert Van der Auwera ,  Marta KARCZEWICZ

    IPC: H04N19/174 ,  H04N19/176 ,  H04N19/11 ,  H04N19/70 ,  H04N19/61

    Abstract: Techniques are described using Position Dependent Intra Prediction Combination (PDPC) and multiple reference lines. For example, a video coder (e.g., an encoder and/or decoder) can predict an initial prediction sample value for a sample of a current block using an intra-prediction mode. The initial prediction sample value can be predicted from a first neighboring block and/or a second neighboring block of the current block. One or more reference sample values can be determined from at least one line of multiple lines of reference samples from the first neighboring block and/or the second neighboring block. At least one of the lines from the multiple lines used for determining the reference sample value(s) is not adjacent to the current block. A final prediction sample value can be determined for the sample of the current block, such as by modifying the initial prediction sample value using the one or more reference sample values.

    FULL PICTURE ORDER COUNT RESET FOR MULTI-LAYER CODECS
    6.
    发明申请
    FULL PICTURE ORDER COUNT RESET FOR MULTI-LAYER CODECS 有权
    多层编解码器的完整图片订单复位

    公开(公告)号：US20150373342A1

    公开(公告)日：2015-12-24

    申请号：US14741253

    申请日：2015-06-16

    Applicant: QUALCOMM Incorporated

    Inventor： Fnu HENDRY ,  Adarsh Krishnan RAMASUBRAMONIAN ,  Ye-Kui WANG

    IPC: H04N19/187

    CPC classification number: H04N19/187 ,  H04N13/161 ,  H04N19/107 ,  H04N19/157 ,  H04N19/30 ,  H04N19/31 ,  H04N19/33 ,  H04N19/46 ,  H04N19/70 ,  H04W84/042 ,  H04W88/02

    Abstract: An apparatus for coding video information according to certain aspects includes a memory unit configured to store video information associated with a plurality of layers and a processor. The processor is configured to obtain information associated with a current access unit (AU) to be coded, the current AU containing pictures from one or more layers of the plurality of layers. The processor is also configured to reset a picture order count (POC) of a layer included in the current AU via (1) resetting only a most significant bit (MSB) of the POC or (2) resetting both the MSB of the POC and a least significant (LSB) of the POC. The processor is further configured to, for pictures in one or more Ails subsequent to the current AU in decoding order: set a value of a first flag indicative whether a reset of the POC is a full reset.

    Abstract translation: 根据某些方面的用于对视频信息进行编码的装置包括被配置为存储与多个层相关联的视频信息的存储器单元和处理器。 处理器被配置为获得与要编码的当前访问单元（AU）相关联的信息，当前AU包含来自所述多个层中的一个或多个层的图片。 处理器还被配置为通过（1）仅复位POC的最高有效位（MSB）来复位当前AU中包括的层的图像顺序计数（POC），或者（2）重置POC的MSB和 POC的最低有效（LSB）。 所述处理器还被配置为：以解码顺序对当前AU之后的一个或多个Ail中的图片进行配置：设置指示POC的复位是否为全复位的第一标志的值。

    DEVICE AND METHOD FOR SCALABLE CODING OF VIDEO INFORMATION
    7.
    发明申请
    DEVICE AND METHOD FOR SCALABLE CODING OF VIDEO INFORMATION 有权
    视频信息可扩展编码的设备和方法

    公开(公告)号：US20150264369A1

    公开(公告)日：2015-09-17

    申请号：US14656447

    申请日：2015-03-12

    Applicant: QUALCOMM Incorporated

    Inventor： Adarsh Krishnan RAMASUBRAMONIAN ,  Fnu HENDRY ,  Ye-Kui WANG

    IPC: H04N19/31 ,  H04N19/187 ,  H04N19/136 ,  H04N19/184

    CPC classification number: H04N19/31 ,  H04N19/136 ,  H04N19/184 ,  H04N19/187 ,  H04N19/30 ,  H04N19/70

    Abstract: An apparatus configured to code video information in a bitstream includes a memory and a processor in communication with the memory. The memory is configured to store video information associated with a video layer having a current picture. The processor is configured to: determine whether a slice segment header extension associated with the current picture is present in the bitstream; and determine that one or more most significant bits (MSBs) of a picture order count (POC) value associated with the current picture are not present in the bitstream in response to a determination that the slice segment header extension associated with the current picture is not present in the bitstream. The processor may encode or decode the video information in the bitstream.

    Abstract translation: 被配置为对位流中的视频信息进行编码的装置包括存储器和与存储器通信的处理器。 存储器被配置为存储与具有当前图片的视频层相关联的视频信息。 处理器被配置为：确定与当前图片相关联的片段标题扩展是否存在于比特流中; 并且确定与当前图片相关联的图片顺序计数（POC）值的一个或多个最高有效位（MSB）不响应于确定与当前图片相关联的片段标题扩展不在存在于比特流中 存在于比特流中。 处理器可以对比特流中的视频信息进行编码或解码。

    DEVICE AND METHOD FOR SCALABLE CODING OF VIDEO INFORMATION
    8.
    发明申请
    DEVICE AND METHOD FOR SCALABLE CODING OF VIDEO INFORMATION 有权
    视频信息可扩展编码的设备和方法

    公开(公告)号：US20150181233A1

    公开(公告)日：2015-06-25

    申请号：US14575788

    申请日：2014-12-18

    Applicant: QUALCOMM Incorporated

    Inventor： Adarsh Krishnan RAMASUBRAMONIAN ,  Fnu HENDRY ,  Ye-Kui WANG

    IPC: H04N19/597 ,  H04N19/52

    CPC classification number: H04N19/597 ,  H04N19/463 ,  H04N19/52 ,  H04N19/70

    Abstract: An apparatus configured to code video information includes a memory unit and a processor in communication with the memory unit. The memory unit is configured to store video information associated with a first video layer having a current picture. The processor is configured to process a first offset associated with the current picture, the first offset indicating a difference between (a) most significant bits (MSBs) of a first picture order count (POC) of a previous picture in the first video layer that precedes the current picture in decoding order and (b) MSBs of a second POC of the current picture.

    Abstract translation: 被配置为对视频信息进行编码的装置包括与存储器单元通信的存储器单元和处理器。 存储单元被配置为存储与具有当前图片的第一视频层相关联的视频信息。 处理器被配置为处理与当前图像相关联的第一偏移，第一偏移指示第一视频层中先前图像的第一图像顺序计数（POC）的（a）最高有效位（MSB）之间的差异， 在当前图片的解码顺序前面和（b）当前图片的第二个POC的MSB。

    REFERENCE PICTURE LIST MODIFICATION FOR VIDEO CODING
    9.
    发明申请
    REFERENCE PICTURE LIST MODIFICATION FOR VIDEO CODING 有权
    参考图片列表修改视频编码

    公开(公告)号：US20140016699A1

    公开(公告)日：2014-01-16

    申请号：US13940064

    申请日：2013-07-11

    Applicant: QUALCOMM Incorporated

    Inventor： Ying CHEN ,  Adarsh Krishnan RAMASUBRAMONIAN

    IPC: H04N7/32

    CPC classification number: H04N19/50 ,  H04N19/573 ,  H04N19/61 ,  H04N19/70

    Abstract: A video decoder generates an initial reference picture list (RPL). Furthermore, the video decoder determines that an ordered set of reference picture list modification (RPLM) syntax elements does not include any additional syntax elements when a syntax element in the ordered set of RPLM syntax elements has a particular value. Furthermore, the video decoder generates a final RPL. For each respective RPLM syntax element in the ordered set of syntax elements, when the respective RPLM syntax element does not have the particular value, the final RPL includes, at an insertion position for the respective RPLM syntax element, a particular reference picture. The respective syntax element indicates a position in the initial RPL of the particular RPLM reference picture. The insertion position for the respective RPLM syntax element corresponds to a position in the ordered set of RPLM syntax elements of the respective RPLM syntax element.

    Abstract translation: 视频解码器生成初始参考图像列表（RPL）。 此外，当RPLM语法元素的有序集合中的语法元素具有特定值时，视频解码器确定参考图像列表修改（RPLM）语法元素的有序集合不包括任何附加语法元素。 此外，视频解码器产生最终的RPL。 对于有序集合语法元素中的每个相应RPLM语法元素，当相应的RPLM语法元素不具有特定值时，最终RPL在相应RPLM语法元素的插入位置处包括特定参考图片。 相应的语法元素指示特定RPLM参考图片的初始RPL中的位置。 相应RPLM语法元素的插入位置对应于相应RPLM语法元素的RPLM语法元素的有序集合中的位置。

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