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公开(公告)号：US09917613B1
公开(公告)日：2018-03-13
申请号：US15414213
申请日：2017-01-24
摘要： A digitally controlled phase shifter and (optional) attenuator circuit that has both a broad range as well as a fine-tuning resolution. Embodiments maintain a full 360° phase range while providing nth-bit least-significant bit (LSB) resolution across the entire range of possible phase shift and attenuation states, and compensate for the effect of frequency and/or PVT variations. In embodiments, two or more range partitionings can be defined that can be monotonic over respective sub-ranges while providing full coverage when combined. One such partitioning is a “coarse+fine” architecture. Embodiments of the coarse+fine architecture provide for greater than 360° of range for phase shifting and more than the total nominal design level for attenuation, and provide for fine ranges for both phase shifting and attenuation that are greater than the LSB of the corresponding coarse ranges for phase shifting and attenuation.
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公开(公告)号：US20170302253A1
公开(公告)日：2017-10-19
申请号：US15462702
申请日：2017-03-17
发明人： Matt Allison , Eric S. Shapiro
摘要： An electronic system that includes a digitally selectable phase shifter circuit and an insertion loss fine adjustment circuit such that the system as a whole exhibits little or no change in insertion loss when changing phase state, and/or a digitally selectable attenuator circuit and a phase fine adjustment circuit such that the system as a whole exhibits little or no effect on phase when changing attenuation state. Included are methods for selecting adjustment control words for such circuits.
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3.发明申请Floating Body Contact Circuit Method for Improving ESD Performance and Switching Speed 审中-公开浮体接触电路提高ESD性能和切换速度的方法公开(公告)号：US20150137246A1
公开(公告)日：2015-05-21
申请号：US14521331
申请日：2014-10-22
发明人： Eric S. Shapiro , Matt Allison
CPC分类号： H01L28/20 , H01L27/027 , H01L27/0629 , H01L27/1203 , H01L29/78 , H03K17/04123 , H03K17/163
摘要： Embodiments of systems, methods, and apparatus for improving ESD performance and switching time for semiconductor devices including metal-oxide-semiconductor (MOS) field effect transistors (FETs), and particularly to MOSFETs fabricated on Semiconductor-On-Insulator (“SOT”) and Silicon-On-Sapphire (“SOS”) substrates.
摘要翻译： 用于改善包括金属氧化物半导体（MOS）场效应晶体管（FET）的半导体器件的ESD性能和开关时间的系统，方法和装置的实施例，特别是针对在半导体绝缘体（“SOT”）上制造的MOSFET， 和硅蓝宝石（“SOS”）基板。
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公开(公告)号：US09941347B2
公开(公告)日：2018-04-10
申请号：US15495819
申请日：2017-04-24
发明人： Eric S. Shapiro , Matt Allison
CPC分类号： H01L28/20 , H01L27/027 , H01L27/0629 , H01L27/1203 , H01L29/78 , H03K17/04123 , H03K17/163
摘要： Embodiments of systems, methods, and apparatus for improving ESD performance and switching time for semiconductor devices including metal-oxide-semiconductor (MOS) field effect transistors (FETs), and particularly to MOSFETs fabricated on Semiconductor-On-Insulator (“SOI”) and Silicon-On-Sapphire (“SOS”) substrates.
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公开(公告)号：US09906208B2
公开(公告)日：2018-02-27
申请号：US15462702
申请日：2017-03-17
发明人： Matt Allison , Eric S. Shapiro
摘要： An electronic system that includes a digitally selectable phase shifter circuit and an insertion loss fine adjustment circuit such that the system as a whole exhibits little or no change in insertion loss when changing phase state, and/or a digitally selectable attenuator circuit and a phase fine adjustment circuit such that the system as a whole exhibits little or no effect on phase when changing attenuation state. Included are methods for selecting adjustment control words for such circuits.
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公开(公告)号：US20150145052A1
公开(公告)日：2015-05-28
申请号：US14521378
申请日：2014-10-22
发明人： Eric S. Shapiro , Matt Allison
CPC分类号： H01L27/1203 , H01L27/0251 , H01L27/0262 , H01L27/027 , H01L27/0288 , H01L29/1095
摘要： Embodiments of systems, methods, and apparatus for improving ESD tolerance and switching time for semiconductor devices including metal-oxide-semiconductor (MOS) field effect transistors (FETs), and particularly to MOSFETs fabricated on semiconductor-on-insulator and silicon-on-sapphire substrates. Embodiments provide an improved FET structure having an accumulated charge sink (ACS) circuit, fast switching times, and improved ESD tolerance.
摘要翻译： 用于改善包括金属氧化物半导体（MOS）场效应晶体管（FET）的半导体器件的ESD耐受性和开关时间的系统，方法和装置的实施例，特别是制造在绝缘体上半导体和硅 - 蓝宝石衬底。 实施例提供了具有累积电荷吸收（ACS）电路，快速切换时间和改善的ESD容限的改进的FET结构。
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公开(公告)号：US09634650B2
公开(公告)日：2017-04-25
申请号：US14752353
申请日：2015-06-26
发明人： Matt Allison , Eric S. Shapiro
摘要： An electronic system that includes a digitally selectable phase shifter circuit and an insertion loss fine adjustment circuit such that the system as a whole exhibits little or no change in insertion loss when changing phase state, and/or a digitally selectable attenuator circuit and a phase fine adjustment circuit such that the system as a whole exhibits little or no effect on phase when changing attenuation state. Included are methods for selecting adjustment control words for such circuits.
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公开(公告)号：US20170338298A1
公开(公告)日：2017-11-23
申请号：US15495819
申请日：2017-04-24
发明人： Eric S. Shapiro , Matt Allison
CPC分类号： H01L28/20 , H01L27/027 , H01L27/0629 , H01L27/1203 , H01L29/78 , H03K17/04123 , H03K17/163
摘要： Embodiments of systems, methods, and apparatus for improving ESD performance and switching time for semiconductor devices including metal-oxide-semiconductor (MOS) field effect transistors (FETs), and particularly to MOSFETs fabricated on Semiconductor-On-Insulator (“SOI”) and Silicon-On-Sapphire (“SOS”) substrates.
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公开(公告)号：US20160380623A1
公开(公告)日：2016-12-29
申请号：US14752353
申请日：2015-06-26
发明人： Matt Allison , Eric S. Shapiro
IPC分类号： H03K5/08
摘要： An electronic system that includes a digitally selectable phase shifter circuit and an insertion loss fine adjustment circuit such that the system as a whole exhibits little or no change in insertion loss when changing phase state, and/or a digitally selectable attenuator circuit and a phase fine adjustment circuit such that the system as a whole exhibits little or no effect on phase when changing attenuation state. Included are methods for selecting adjustment control words for such circuits.
摘要翻译： 一种电子系统，其包括数字可选择的移相器电路和插入损耗微调电路，使得当改变相位状态时，整个系统在插入损耗方面几乎没有或没有变化，和/或数字可选择的衰减器电路和相位精细 调整电路，使得当改变衰减状态时，整个系统对相位几乎没有或没有影响。 包括用于选择这些电路的调节控制字的方法。
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公开(公告)号：US09406695B2
公开(公告)日：2016-08-02
申请号：US14521378
申请日：2014-10-22
发明人： Eric S. Shapiro , Matt Allison
CPC分类号： H01L27/1203 , H01L27/0251 , H01L27/0262 , H01L27/027 , H01L27/0288 , H01L29/1095
摘要： Embodiments of systems, methods, and apparatus for improving ESD tolerance and switching time for semiconductor devices including metal-oxide-semiconductor (MOS) field effect transistors (FETs), and particularly to MOSFETs fabricated on semiconductor-on-insulator and silicon-on-sapphire substrates. Embodiments provide an improved FET structure having an accumulated charge sink (ACS) circuit, fast switching times, and improved ESD tolerance.
摘要翻译： 用于改善包括金属氧化物半导体（MOS）场效应晶体管（FET）的半导体器件的ESD耐受性和开关时间的系统，方法和装置的实施例，特别是制造在绝缘体上半导体和硅 - 蓝宝石衬底。 实施例提供了具有累积电荷吸收（ACS）电路，快速切换时间和改善的ESD容限的改进的FET结构。
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