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公开(公告)号:US20150255544A1
公开(公告)日:2015-09-10
申请号:US14632895
申请日:2015-02-26
Inventor: MASAO UCHIDA , MASASHI HAYASHI , KOUTAROU TANAKA
IPC: H01L29/16 , H01L29/66 , H01L29/10 , H01L21/04 , H01L29/872 , H01L29/47 , H01L29/45 , H01L21/02 , H01L29/812 , H01L29/36
CPC classification number: H01L29/1608 , H01L21/0485 , H01L21/0495 , H01L29/0619 , H01L29/0692 , H01L29/423 , H01L29/45 , H01L29/47 , H01L29/6606 , H01L29/66068 , H01L29/7806 , H01L29/7811 , H01L29/7828 , H01L29/872
Abstract: A semiconductor device includes first and second second-conductivity-type region groups containing multiple second-conductivity-type regions that are disposed on a first silicon carbide semiconductor layer of a first conductivity type, arrayed in parallel following one direction with a space between each other, and first and second electrodes disposed on the first silicon carbide semiconductor layer and forming a Schottky junction with the first silicon carbide semiconductor layer. The first electrode covers a position where a distance from adjacent first and second second-conductivity-type regions included in a first second-conductivity-type region group, and a distance from a third second-conductivity-type region included in a second second-conductivity-type region group and adjacent to the first and second second-conductivity-type regions, are equal. A Schottky barrier between the first electrode and the first silicon carbide semiconductor layer is larger than a Schottky barrier between the second electrode and the first silicon carbide semiconductor layer.
Abstract translation: 半导体器件包括第一和第二第二导电型区域组,其包含多个第二导电类型区域,所述第二导电类型区域设置在第一导电类型的第一碳化硅半导体层上,并排沿着一个方向并排放置 以及设置在第一碳化硅半导体层上并与第一碳化硅半导体层形成肖特基结的第一和第二电极。 第一电极覆盖从包括在第一第二导电类型区域组中的相邻第一和第二第二导电类型区域到与包括在第二第二导电类型区域组中的第三第二导电类型区域的距离的位置, 导电类型区域组并且与第一和第二第二导电类型区域相邻。 第一电极和第一碳化硅半导体层之间的肖特基势垒大于第二电极和第一碳化硅半导体层之间的肖特基势垒。