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Patent Agency Ranking
公开(公告)号：US09627337B2
公开(公告)日：2017-04-18
申请号：US14740286
申请日：2015-06-16
Applicant: Novatek Microelectronics Corp.
Inventor： Jung-Fu Hsu , Tai-Hung Lin , Chang-Tien Tsai
CPC classification number: H01L24/06 , H01L23/50 , H01L23/60 , H01L24/05 , H01L24/45 , H01L24/48 , H01L24/49 , H01L27/0248 , H01L27/0292 , H01L27/0296 , H01L2224/02166 , H01L2224/04042 , H01L2224/05088 , H01L2224/05095 , H01L2224/05124 , H01L2224/05147 , H01L2224/05553 , H01L2224/05554 , H01L2224/05624 , H01L2224/0612 , H01L2224/45015 , H01L2224/451 , H01L2224/48091 , H01L2224/4813 , H01L2224/48132 , H01L2224/48464 , H01L2224/48465 , H01L2224/49113 , H01L2924/00014 , H01L2924/01029 , H01L2924/2064 , H01L2924/30205 , H01L2924/00 , H01L2924/00015 , H01L2224/43
Abstract: An integrated circuit device including a semiconductor substrate, a first bonding pad structure, a second bonding pad structure, and an internal bonding wire is provided. The first bonding pad structure is disposed on a surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The second bonding pad structure is disposed on the surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The first bonding pad structure is electrically coupled to the second bonding pad structure via the internal bonding wire. The integrated circuit device having a better electrical performance is provided by eliminating internal resistance drop in power supply trails or ground trails, and improving signal integrity of the integrated circuit device.
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公开(公告)号：USRE46434E1
公开(公告)日：2017-06-13
申请号：US14469604
申请日：2014-08-27
Applicant: Novatek Microelectronics Corp.
Inventor： Meng-Nan Tsou , Jung-Fu Hsu
IPC: H04N5/85 , G11B27/10 , H04N21/488
CPC classification number: G11B27/10 , G11B2220/2562 , H04N5/4401 , H04N5/45 , H04N5/76 , H04N5/85 , H04N7/0122 , H04N9/8227 , H04N21/4316 , H04N21/4347 , H04N21/440263 , H04N21/4884
Abstract: A video decoding apparatus capable of controlling presentation of sub-pictures includes a first decoder, a second decoder, a first scaler, a second scaler and a combiner. The first decoder and the second decoder respectively decode a digital audio/video signal to generate a decoded video and a decoded sub-picture. In accordance with an output picture size, the decoded video size, the decoded sub-picture size and a sub-picture aspect ratio, the first scaler and the second scaler generate a first scaling factor and a second scaling factor. The combiner combines the decoded video and the decoded sub-picture according to the first scaling factor and the second scaling factor and outputs the combination thereof. A video decoding method and a digital audio/video playback system capable of controlling presentation of sub-pictures are also disclosed.
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公开(公告)号：US20150287686A1
公开(公告)日：2015-10-08
申请号：US14740286
申请日：2015-06-16
Applicant: Novatek Microelectronics Corp.
Inventor： Jung-Fu Hsu , Tai-Hung Lin , Chang-Tien Tsai
CPC classification number: H01L24/06 , H01L23/50 , H01L23/60 , H01L24/05 , H01L24/45 , H01L24/48 , H01L24/49 , H01L27/0248 , H01L27/0292 , H01L27/0296 , H01L2224/02166 , H01L2224/04042 , H01L2224/05088 , H01L2224/05095 , H01L2224/05124 , H01L2224/05147 , H01L2224/05553 , H01L2224/05554 , H01L2224/05624 , H01L2224/0612 , H01L2224/45015 , H01L2224/451 , H01L2224/48091 , H01L2224/4813 , H01L2224/48132 , H01L2224/48464 , H01L2224/48465 , H01L2224/49113 , H01L2924/00014 , H01L2924/01029 , H01L2924/2064 , H01L2924/30205 , H01L2924/00 , H01L2924/00015 , H01L2224/43
Abstract: An integrated circuit device including a semiconductor substrate, a first bonding pad structure, a second bonding pad structure, and an internal bonding wire is provided. The first bonding pad structure is disposed on a surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The second bonding pad structure is disposed on the surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The first bonding pad structure is electrically coupled to the second bonding pad structure via the internal bonding wire. The integrated circuit device having a better electrical performance is provided by eliminating internal resistance drop in power supply trails or ground trails, and improving signal integrity of the integrated circuit device.
Abstract translation: 提供了包括半导体衬底，第一焊盘结构，第二接合焊盘结构和内部接合线的集成电路器件。 第一焊盘结构设置在半导体衬底的表面上并暴露在半导体衬底的外部。 第二焊盘结构设置在半导体衬底的表面上并暴露在半导体衬底的外部。 第一焊盘结构通过内部接合线电耦合到第二接合焊盘结构。 具有更好的电气性能的集成电路器件通过消除电源轨迹或接地轨迹中的内部电阻下降以及提高集成电路器件的信号完整性来提供。
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公开(公告)号：US09881892B2
公开(公告)日：2018-01-30
申请号：US15412072
申请日：2017-01-23
Applicant: Novatek Microelectronics Corp.
Inventor： Jung-Fu Hsu , Tai-Hung Lin , Chang-Tien Tsai
CPC classification number: H01L24/06 , H01L23/50 , H01L23/60 , H01L24/05 , H01L24/45 , H01L24/48 , H01L24/49 , H01L27/0248 , H01L27/0292 , H01L27/0296 , H01L2224/02166 , H01L2224/04042 , H01L2224/05088 , H01L2224/05095 , H01L2224/05124 , H01L2224/05147 , H01L2224/05553 , H01L2224/05554 , H01L2224/05624 , H01L2224/0612 , H01L2224/45015 , H01L2224/451 , H01L2224/48091 , H01L2224/4813 , H01L2224/48132 , H01L2224/48464 , H01L2224/48465 , H01L2224/49113 , H01L2924/00014 , H01L2924/01029 , H01L2924/2064 , H01L2924/30205 , H01L2924/00 , H01L2924/00015 , H01L2224/43
Abstract: An integrated circuit device including a semiconductor substrate, a first bonding pad structure, a second bonding pad structure, a third bonding pad structure, a first internal bonding wire, and a second internal bonding wire is provided. The first bonding pad structure is disposed on a surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The second bonding pad structure is disposed on the surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The third bonding pad structure is disposed on the surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The first bonding pad structure is electrically coupled to the third bonding pad structure via the first internal bonding wire. The third bonding pad structure is electrically coupled to the second bonding pad structure via the second internal bonding wire.
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公开(公告)号：US20170133343A1
公开(公告)日：2017-05-11
申请号：US15412072
申请日：2017-01-23
Applicant: Novatek Microelectronics Corp.
Inventor： Jung-Fu Hsu , Tai-Hung Lin , Chang-Tien Tsai
CPC classification number: H01L24/06 , H01L23/50 , H01L23/60 , H01L24/05 , H01L24/45 , H01L24/48 , H01L24/49 , H01L27/0248 , H01L27/0292 , H01L27/0296 , H01L2224/02166 , H01L2224/04042 , H01L2224/05088 , H01L2224/05095 , H01L2224/05124 , H01L2224/05147 , H01L2224/05553 , H01L2224/05554 , H01L2224/05624 , H01L2224/0612 , H01L2224/45015 , H01L2224/451 , H01L2224/48091 , H01L2224/4813 , H01L2224/48132 , H01L2224/48464 , H01L2224/48465 , H01L2224/49113 , H01L2924/00014 , H01L2924/01029 , H01L2924/2064 , H01L2924/30205 , H01L2924/00 , H01L2924/00015 , H01L2224/43
Abstract: An integrated circuit device including a semiconductor substrate, a first bonding pad structure, a second bonding pad structure, a third bonding pad structure, a first internal bonding wire, and a second internal bonding wire is provided. The first bonding pad structure is disposed on a surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The second bonding pad structure is disposed on the surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The third bonding pad structure is disposed on the surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The first bonding pad structure is electrically coupled to the third bonding pad structure via the first internal bonding wire. The third bonding pad structure is electrically coupled to the second bonding pad structure via the second internal bonding wire.
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