公开(公告)号：US06487110B2

公开(公告)日：2002-11-26

申请号：US09963519

申请日：2001-09-27

Applicant: Naoki Nishimura ,  Yoshinobu Sekiguchi ,  Tadahiko Hirai

Inventor： Naoki Nishimura ,  Yoshinobu Sekiguchi ,  Tadahiko Hirai

IPC: G11C1115

CPC classification number: G11C11/15

Abstract: The fabrication process of a conventional MRAM using a magnetoresistive effect element as a memory device is difficult, and the device structure makes it difficult to decrease the cell area and increase the degree of integration. It is an object of this invention to realize an MRAM which can achieve a high integration degree. A memory device is characterized by including a magnetoresistive element, a bit line formed above this magnetoresistive element, and a write line. The magnetoresistive element is formed immediately above the drain region of a field-effect transistor.

Abstract translation: 使用磁阻效应元件作为存储器件的常规MRAM的制造过程是困难的，并且器件结构使得难以减小单元面积并增加集成度。 本发明的目的是实现可以实现高集成度的MRAM。 存储器件的特征在于包括磁阻元件，形成在该磁阻元件上方的位线和写入线。 磁阻元件形成在场效应晶体管的漏区正上方。

公开(公告)号：US06703676B2

公开(公告)日：2004-03-09

申请号：US10235810

申请日：2002-09-06

Applicant: Tadahiko Hirai ,  Naoki Nishimura

Inventor： Tadahiko Hirai ,  Naoki Nishimura

IPC: H01L2982

CPC classification number: H01L27/228 ,  B82Y10/00

Abstract: TMR elements in a magnetic memory device are formed to be flat to enable their stable operations. A TMR element is formed by putting a tunnel barrier layer being a non-magnetic layer between an upper magnetic layer and a lower magnetic layer, both having a perpendicular magnetic anisotropy. A conductive local connect elongating in a plane is formed on a second plug formed in a contact hole formed in a second and a third inter-layer insulating films. The TMR element is formed on the local connect at a position avoiding a position right above the second plug. The TMR element is connected with the upper surface of the second plug through the local connect. A bit line through which an electric current for applying a magnetic field to the TMR element flows is formed at a position shifted from a position right above the TMR element in a plane.

Abstract translation: 磁存储器件中的TMR元件形成为平坦的，以使它们稳定地工作。 通过将具有垂直磁各向异性的上磁性层和下磁性层之间的非磁性层的隧道势垒层设置成TMR元件。 在形成在形成在第二和第三层间绝缘膜中的接触孔中的第二插塞上形成在平面内延伸的导电局部连接。 TMR元件形成在本地连接处，避开位于第二插头正上方的位置。 TMR元件通过本地连接与第二个插头的上表面连接。 在TMR元件的正上方的位置偏移的位置，形成用于向TMR元件施加磁场的电流流过的位线。

公开(公告)号：US07696883B2

公开(公告)日：2010-04-13

申请号：US11665483

申请日：2006-01-16

Applicant: Takayuki Sumida ,  Tadahiko Hirai

Inventor： Takayuki Sumida ,  Tadahiko Hirai

IPC: G08B13/14

CPC classification number: H04B5/0012 ,  G08B13/242 ,  G08B13/2431 ,  G08B13/2457

Abstract: In a resonance tag provided with a resonance circuit composed of a capacitive element and an inductive element, the capacitive element is characterized by having a condition under which the capacitance of the capacitive element is reversibly changed by a voltage applied to the resonance circuit and anther condition under which the capacitance of the capacitive element is irreversibly changed by another voltage applied to the resonance circuit.

Abstract translation: 在设置有由电容元件和电感元件构成的谐振电路的谐振标签中，电容元件的特征在于具有这样的条件，在该条件下，电容元件的电容由施加到谐振电路的电压而可逆地改变， 电容元件的电容在施加到谐振电路的另一电压下不可逆地改变。

公开(公告)号：US6084260A

公开(公告)日：2000-07-04

申请号：US999005

申请日：1997-12-29

Applicant: Tadahiko Hirai ,  Yasuo Tarui

Inventor： Tadahiko Hirai ,  Yasuo Tarui

IPC: H01L21/02 ,  H01L21/314 ,  H01L21/316 ,  H01L29/51 ,  H01L29/76

CPC classification number: H01L21/31691 ,  H01L29/516 ,  H01L28/56

Abstract: An Si oxide film, an oriented paraelectric oxide thin film and an oriented ferroelectric thin film are laminated on an Si single crystal substrate having a region for a source and a drain. A conductor thin film is formed in a portion not covered with an insulating film. A laminated structure formed of the Si oxide film, the oriented paraelectric oxide thin film and the oriented ferroelectric thin film is used as a gate of a transistor. The Si oxide film functions as a carrier injection inhibiting layer.

Abstract translation: 在具有用于源极和漏极的区域的Si单晶衬底上层叠Si氧化物膜，取向的顺电氧化物薄膜和取向的铁电薄膜。 导体薄膜形成在未被绝缘膜覆盖的部分中。 作为晶体管的栅极，使用由Si氧化膜，取向的顺电氧化物薄膜和取向的铁电薄膜构成的层叠结构。 Si氧化膜用作载流子注入抑制层。

公开(公告)号：US08043000B2

公开(公告)日：2011-10-25

申请号：US12563993

申请日：2009-09-21

Applicant: Takayuki Sumida ,  Tadahiko Hirai

Inventor： Takayuki Sumida ,  Tadahiko Hirai

IPC: G01K7/00 ,  G01K11/00 ,  G01K3/00

CPC classification number: G01K11/08 ,  G01K7/32

Abstract: A temperature-history sensor includes a resonance circuit composed of at least a capacitor and a coil. The temperature-history sensor has a display for indicating a predetermined set temperature of the temperature-history sensor. The capacitor has at least a thermofusion material between electrodes of the capacitor, and the melting point of the thermofusion material is in the region of the set temperature.

Abstract translation: 温度历史传感器包括由至少电容器和线圈组成的谐振电路。 温度历史传感器具有用于指示温度历史传感器的预定设定温度的显示。 电容器在电容器的电极之间至少具有热熔融材料，并且热熔融材料的熔点处于设定温度的范围内。

公开(公告)号：US20100073265A1

公开(公告)日：2010-03-25

申请号：US12515680

申请日：2008-05-21

Applicant: Tadahiko Hirai ,  Jun Sumioka ,  Kaoru Okamoto

Inventor： Tadahiko Hirai ,  Jun Sumioka ,  Kaoru Okamoto

IPC: G09G3/20

CPC classification number: G09G3/3283 ,  G09G3/3241 ,  G09G3/325 ,  G09G2300/0861 ,  G09G2310/0251 ,  G09G2320/0285 ,  G09G2320/043

Abstract: An active-matrix display includes a data line, at least one select line, a control unit supplying a voltage signal and a current signal to the data line, and a pixel circuit receiving the voltage signal and the current signal from the data line to drive a light emitting element, the control unit including a voltage or first current source supplying a voltage or current pulse to the data line in order to make the voltage holding unit hold the voltage signal for making the light emitting element emit light having predetermined brightness in a first selection period in which the first switch is closed, a second current source supplying the current signal for making the light emitting element emit light having the predetermined brightness to the data line in a second selection period in which the first switch and the second switch are closed, a detection circuit detecting potential held in the voltage holding unit in the second selection period, and a correction unit correcting the voltage signal based on a relationship between the current signal and the detected potential.

Abstract translation: 有源矩阵显示器包括数据线，至少一个选择线，向数据线提供电压信号和电流信号的控制单元，以及从数据线接收电压信号和电流信号以驱动的像素电路 发光元件，所述控制单元包括向所述数据线提供电压或电流脉冲的电压或第一电流源，以使所述电压保持单元保持所述电压信号，以使得所述发光元件在所述发光元件中发射具有预定亮度的光 第一开关闭合的第一选择期间，在第一开关和第二开关为止的第二选择期间，向第一开关供给用于使发光元件发光的电流信号的第二电流源向数据线发射 关闭在第二选择期间保持在电压保持单元中的检测电路的检测电路和校正电压的校正单元 基于当前信号与检测电位之间的关系的信号。

公开(公告)号：US07607829B2

公开(公告)日：2009-10-27

申请号：US11945259

申请日：2007-11-26

Applicant: Takayuki Sumida ,  Tadahiko Hirai

Inventor： Takayuki Sumida ,  Tadahiko Hirai

IPC: G01K7/00

CPC classification number: G01K11/08 ,  G01K7/32

Abstract: A temperature-history sensor includes a resonance circuit composed of at least a capacitor and a coil. The temperature-history sensor has a display for indicating a predetermined set temperature of the temperature-history sensor. The capacitor has at least a thermofusion material between electrodes of the capacitor, and the melting point of the thermofusion material is in the region of the set temperature.

Abstract translation: 温度历史传感器包括由至少电容器和线圈组成的谐振电路。 温度历史传感器具有用于指示温度历史传感器的预定设定温度的显示。 电容器在电容器的电极之间至少具有热熔融材料，并且热熔融材料的熔点处于设定温度的范围内。

公开(公告)号：US20080297056A1

公开(公告)日：2008-12-04

申请号：US12127124

申请日：2008-05-27

Applicant: Tadahiko Hirai

Inventor： Tadahiko Hirai

IPC: G09G3/00 ,  G06F3/038

CPC classification number: G09G3/3241 ,  G09G2300/0408 ,  G09G2300/0842 ,  G09G2310/0262 ,  G09G2320/043

Abstract: The present invention provides a light emitting element circuit that includes a current mirror circuit which includes two thin film transistors, two current input terminals and two output terminals, a capacitor for holding voltage corresponding to an electric current to be input from one of the two current input terminals, and a light emitting element connected to the current mirror circuit, and that supplies an electric current in accordance with the voltage held in the capacitor to the light emitting element through the current mirror circuit, wherein the two output terminals of the current mirror circuit are connected to the light emitting element, and the two current input terminals of the current mirror circuit are connected with each other through a switch in a time period other than a time period during which an electric current is input from the one of the two current input terminals.

Abstract translation: 本发明提供了一种发光元件电路，其包括电流镜电路，其包括两个薄膜晶体管，两个电流输入端子和两个输出端子，用于保持对应于从两个电流之一输入的电流的电压的电容器 输入端子和连接到电流镜电路的发光元件，并且通过电流镜电路将依照电容器中保持的电压的电流提供给发光元件，其中电流镜的两个输出端 电路连接到发光元件，并且电流镜电路的两个电流输入端子通过开关在除二极管中的一个输入电流的时间段之外的时间段内彼此连接 电流输入端子。

公开(公告)号：US07355879B2

公开(公告)日：2008-04-08

申请号：US10555964

申请日：2004-12-07

Applicant: Tadahiko Hirai ,  Kikuzo Sawada

Inventor： Tadahiko Hirai ,  Kikuzo Sawada

IPC: G11C11/00

CPC classification number: G11C13/003 ,  B82Y10/00 ,  G11C13/0014 ,  G11C17/16 ,  G11C17/165 ,  G11C2213/34 ,  G11C2213/76 ,  G11C2213/79 ,  H01L27/101 ,  H01L27/105 ,  H01L27/283

Abstract: One main electrode of a TFT is connected with one terminal of a two-terminal type nonvolatile memory element, a gate electrode of the TFT is connected with a word line, and the other main electrode thereof is connected with a bit line. The other terminal of the memory element is connected with a base line. A fixed resistor is connected between a connecting point between the other main electrode of the TFT and the bit line and an input terminal of the bit line. In information writing for changing the memory element whose initial state is a low impedance state to a high impedance state, voltages having polarities reverse relative to a reference voltage are applied to the input terminal of the bit line and an input terminal of the base line, respectively, so that a high voltage necessary to change the state is applied between both the terminals of the memory element.

Abstract translation: TFT的一个主电极与两端型非易失性存储元件的一个端子连接，TFT的栅电极与字线连接，而另一个主电极与位线连接。 存储元件的另一个端子与基线连接。 在TFT的另一个主电极和位线之间的连接点和位线的输入端子之间连接一个固定电阻器。 在将初始状态为低阻抗状态的存储元件改变为高阻抗状态的信息写入中，具有相对于参考电压相反极性的电压被施加到位线的输入端和基线的输入端， 从而在存储元件的两个端子之间施加改变状态所需的高电压。

公开(公告)号：US20060108416A1

公开(公告)日：2006-05-25

申请号：US10538037

申请日：2004-03-26

Applicant: Tadahiko Hirai

Inventor： Tadahiko Hirai

IPC: G06K5/00 ,  G06K19/06

CPC classification number: G06K19/07363 ,  G06K19/073

Abstract: An unauthorized access prevention method is provided for an integrated circuit including one or plural resistor elements capable of selecting between a high impedance state and a low impedance state irreversibly in an interface portion within the integrated circuit or a peripheral circuit portion. When a signal inconsistent with verification information and standard that are preset in the integrated circuit is received at least once, the impedance state of the resistor element is changed from an initial state to stop a part or all of accesses to the integrated circuit irreversibly. The unauthorized access prevention method is thus implemented by a simple structure manufactured with ease and at low cost.

Abstract translation: 提供了一种用于集成电路的未经授权的访问防止方法，该集成电路包括能够在集成电路或外围电路部分中的接口部分中不可逆地在高阻抗状态和低阻抗状态之间选择的一个或多个电阻器元件。 当至少接收到与集成电路中预设的验证信息和标准不一致的信号时，电阻元件的阻抗状态从初始状态改变，以不可逆地停止对集成电路的部分或全部访问。 因此，通过以简单且低成本制造的简单结构来实现未授权的访问防止方法。