Semiconductor device and manufacturing method thereof

    公开(公告)号:US11943910B2

    公开(公告)日:2024-03-26

    申请号:US17646482

    申请日:2021-12-30

    Inventor: Chung-Lin Huang

    CPC classification number: H10B12/053 H10B12/34

    Abstract: A manufacturing method of a semiconductor device includes forming an opening in a substrate, implanting a dopant in the substrate from a sidewall of the opening such that a doping region is formed in the substrate at the sidewall of the opening, filling a dielectric material in the opening to form a first dielectric structure after implanting the dopant in the substrate from the sidewall of the opening, and forming a passing word line in the dielectric structure.

    Semiconductor structure and manufacturing method thereof

    公开(公告)号:US10651081B2

    公开(公告)日:2020-05-12

    申请号:US16138066

    申请日:2018-09-21

    Inventor: Chung-Lin Huang

    Abstract: The present disclosure provides a semiconductor structure and a method for manufacturing the semiconductor structure. The semiconductor structure includes a semiconductor substrate, a dielectric layer, a barrier layer, and a conductive layer. The semiconductor substrate has a plurality of mesas. The dielectric layer is disposed over the semiconductor substrate and has a plurality of blocks disposed over the mesas, respectively. The barrier layer is formed over a first lateral surface of the mesa, a second lateral surface of the block, an upper surface of the semiconductor substrate adjacent to the first lateral surface, and a front surface of the dielectric layer adjacent to the second lateral surface. The conductive layer has a base and a plurality of protrusions extending from the base and in contact with the barrier layer disposed over the upper surface, the first lateral surface, and the second lateral surface. A grain size of the base and the protrusions is consistent.

    Antifuse element
    4.
    发明授权

    公开(公告)号:US11121081B2

    公开(公告)日:2021-09-14

    申请号:US16656711

    申请日:2019-10-18

    Abstract: An antifuse element includes a conductive region formed in a semiconductor substrate extending in a first direction, a dielectric layer formed on a portion of the conductive region, a first conductive plug formed on the dielectric layer, a second conductive plug formed on another portion of the conductive region, a first conductive member formed over the first conductive plug, and a second conductive member formed over the second conductive plug. The dielectric layer has a first dielectric portion extending in a second direction, and a second dielectric portion extending in the first direction, in which the dielectric layer implements an electrical isolation between the conductive region and the first conductive plug. The first conductive plug has a first region of a first width and a second region of a second width, and the first width is greater than the second width.

    Method of manufacturing semiconductor device structure having a channel layer with different roughness

    公开(公告)号:US12219749B2

    公开(公告)日:2025-02-04

    申请号:US17653629

    申请日:2022-03-04

    Abstract: A semiconductor device structure and method for manufacturing the same are provided. The method includes: providing a substrate; forming a first word line and a second word line extending along a first direction; forming a dielectric material conformally on a first sidewall of the first word line and on a second sidewall of the second word line, wherein the second sidewall of the second word line faces the first sidewall of the first word line; forming a semiconductor material on a sidewall of the dielectric material; and patterning the dielectric material and the semiconductor material to form a gate dielectric structure and a channel layer between the first word line and the second word line.

    Semiconductor structure having dummy pattern around array area and method of manufacturing the same

    公开(公告)号:US11315887B2

    公开(公告)日:2022-04-26

    申请号:US16902726

    申请日:2020-06-16

    Abstract: The present disclosure provides a semiconductor structure and a method of manufacturing the semiconductor structure. The semiconductor structure includes a substrate defined with a peripheral region and an array area at least partially surrounded by the peripheral region, wherein the substrate includes a plurality of fins protruding from the substrate and disposed in the array area, and a first elongated member protruding from the substrate and at least partially surrounding the plurality of fins; an insulating layer disposed over the plurality of fins and the first elongated member; a capping layer disposed over the insulating layer; and an isolation surrounding the plurality of fins, the first elongated member, the insulating layer and the capping layer.

    Semiconductor capacitor structure

    公开(公告)号:US10985163B2

    公开(公告)日:2021-04-20

    申请号:US16720846

    申请日:2019-12-19

    Inventor: Chung-Lin Huang

    Abstract: The present disclosure provides a semiconductor capacitor structure. The semiconductor capacitor structure includes a substrate, a comb-like bottom electrode disposed over the substrate, a top electrode disposed over the comb-like bottom electrode, and a dielectric layer sandwiched between the top electrode and the comb-like bottom electrode. The comb-like bottom electrode includes a plurality of tooth portions parallel to the substrate and a supporting portion coupled to the plurality of tooth portions and perpendicular to the substrate.

    Semiconductor structure and manufacturing method thereof

    公开(公告)号:US10573725B1

    公开(公告)日:2020-02-25

    申请号:US16137236

    申请日:2018-09-20

    Inventor: Chung-Lin Huang

    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a semiconductor substrate, a dielectric layer, and silicide layer. The semiconductor substrate has a plurality of protrusions. The dielectric layer is disposed over the semiconductor substrate and has a plurality of blocks disposed over the protrusions. The silicide layer is disposed over a first sidewall of the protrusions, a second sidewall of the blocks, and an upper surface of the semiconductor substrate adjacent to the first sidewall, and a bottom surface of the silicide layer is lower than a first surface of the semiconductor substrate. The present disclosure further provides a method for manufacturing the semiconductor structure.

    Semiconductor device and manufacturing method thereof

    公开(公告)号:US12225709B2

    公开(公告)日:2025-02-11

    申请号:US18582672

    申请日:2024-02-21

    Inventor: Chung-Lin Huang

    Abstract: A manufacturing method of a semiconductor device includes forming an opening in a substrate, implanting a dopant in the substrate from a sidewall of the opening such that a doping region is formed in the substrate at the sidewall of the opening, filling a dielectric material in the opening to form a first dielectric structure after implanting the dopant in the substrate from the sidewall of the opening, and forming a passing word line in the dielectric structure.

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