Output reference voltage
    2.
    发明授权

    公开(公告)号:US11422577B1

    公开(公告)日:2022-08-23

    申请号:US17382494

    申请日:2021-07-22

    Inventor: Liuchun Cai

    Abstract: An example apparatus can be a low voltage bandgap circuit that includes a bandgap core portion. The bandgap core portion includes an operational amplifier (op-amp). The op-amp includes a PMOS input and an NMOS input. Further, the op-amp is a folded cascode op-amp. The bandgap core portion further includes a first diode coupled to the op-amp. The bandgap core portion further includes a second diode coupled to the op-amp through a resistor.

    DRAIN-BALLASTED ELECTROSTATIC DISCHARGE PROTECTION CIRCUITS

    公开(公告)号:US20240372360A1

    公开(公告)日:2024-11-07

    申请号:US18647962

    申请日:2024-04-26

    Abstract: An apparatus includes a first voltage domain including a first circuit configured to operate at a first supply voltage, a second voltage domain including second circuit configured to operate at a second supply voltage, and a drain-ballasted electrostatic discharge (ESD) protection circuit configured to electrically couple the first voltage domain and the second voltage domain, the drain-ballasted ESD protection circuit including a first NMOS transistor, a second NMOS transistor, a floating interconnect that electrically couples the first NMOS transistor to the second NMOS transistor, and a grounding resistor coupled to the first NMOS transistor and the second NMOS transistor.

    POWER-ON-RESET FOR MEMORY
    4.
    发明申请

    公开(公告)号:US20210327517A1

    公开(公告)日:2021-10-21

    申请号:US17360636

    申请日:2021-06-28

    Inventor: Liuchun Cai

    Abstract: A system can include a voltage generator configured to generate a reference voltage, a power-up voltage, and a replicated voltage based on a power supply voltage. The system can further include a logic sub-component coupled to the voltage generator and configured to output a reset signal based on a comparison of the reference voltage to the power-up voltage and an indication that the reference voltage that has entered a steady state and is reliable as a measurement with respect to a voltage level of the power supply voltage. The indication can be determined based on a comparison of the replicated voltage to a particular threshold voltage level.

    POWER-ON-RESET FOR MEMORY
    5.
    发明申请

    公开(公告)号:US20210193236A1

    公开(公告)日:2021-06-24

    申请号:US16722132

    申请日:2019-12-20

    Inventor: Liuchun Cai

    Abstract: A system can include a voltage generator configured to generate a reference voltage, a power-up voltage, and a replicated voltage based on a power supply voltage. The system can further include a logic sub-component coupled to the voltage generator and configured to output a reset signal based on a comparison of the reference voltage to the power-up voltage and an indication that the reference voltage that has entered a steady state and is reliable as a measurement with respect to a voltage level of the power supply voltage. The indication can be determined based on a comparison of the replicated voltage to a particular threshold voltage level.

    Power-on-reset for memory
    7.
    发明授权

    公开(公告)号:US11854628B2

    公开(公告)日:2023-12-26

    申请号:US17360636

    申请日:2021-06-28

    Inventor: Liuchun Cai

    CPC classification number: G11C16/34 G06F1/24 G11C11/4093 G11C16/12 G11C16/30

    Abstract: A system can include a voltage generator configured to generate a reference voltage, a power-up voltage, and a replicated voltage based on a power supply voltage. The system can further include a logic sub-component coupled to the voltage generator and configured to output a reset signal based on a comparison of the reference voltage to the power-up voltage and an indication that the reference voltage that has entered a steady state and is reliable as a measurement with respect to a voltage level of the power supply voltage. The indication can be determined based on a comparison of the replicated voltage to a particular threshold voltage level.

    Power-on-reset for memory
    8.
    发明授权

    公开(公告)号:US11049576B1

    公开(公告)日:2021-06-29

    申请号:US16722132

    申请日:2019-12-20

    Inventor: Liuchun Cai

    Abstract: A system can include a voltage generator configured to generate a reference voltage, a power-up voltage, and a replicated voltage based on a power supply voltage. The system can further include a logic sub-component coupled to the voltage generator and configured to output a reset signal based on a comparison of the reference voltage to the power-up voltage and an indication that the reference voltage that has entered a steady state and is reliable as a measurement with respect to a voltage level of the power supply voltage. The indication can be determined based on a comparison of the replicated voltage to a particular threshold voltage level.

    QUADRATURE SIGNAL GENERATION
    9.
    发明申请

    公开(公告)号:US20200112423A1

    公开(公告)日:2020-04-09

    申请号:US16424743

    申请日:2019-05-29

    Abstract: Apparatuses and methods for quadrature signal generation are provided. An example includes a quadrature signal generator. The quadrature signal generator is configured to generate, based on a received differential signal, a plurality of quadrature clock signals at a same frequency as that of the received differential signal. The quadrature signal generator is also configured to provide the plurality of quadrature clock signals to a memory system.

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