Systems and methods for adaptive self-referenced reads of memory devices

    公开(公告)号:US11538522B1

    公开(公告)日:2022-12-27

    申请号:US17364067

    申请日:2021-06-30

    IPC分类号: G11C7/14 G11C16/28 G11C13/00

    摘要: Methods and systems include memory devices with a memory array comprising a plurality of memory cells. The memory devices include a control circuit operatively coupled to the memory array and configured to receive a read request for data and to apply a first voltage to the memory array based on the read request. The control circuit is additionally configured to count a total number of the plurality of memory cells that have switched to an active read state based on the first voltage and to apply a second voltage to the memory array based on the total number. The control circuit is further configured to return the data based at least on bits stored in a first and a second set of the plurality of memory cells.

    Transaction metadata
    2.
    发明授权

    公开(公告)号:US11256565B2

    公开(公告)日:2022-02-22

    申请号:US16931787

    申请日:2020-07-17

    摘要: Apparatuses and methods related to providing transaction metadata. Providing transaction metadata includes providing an address of data stored in the memory device using an address bus coupled to the memory device and the controller. Providing transaction metadata also includes transferring the data, associated with the address, from the memory device using a data bus coupled to the memory device and the controller. Providing transaction metadata further includes transferring a sideband signal synchronously with the data bus and in conjunction with the address bus using a transaction metadata bus coupled to the memory device and the controller.

    ARCHITECTURE-BASED POWER MANAGEMENT FOR A MEMORY DEVICE

    公开(公告)号:US20210064113A1

    公开(公告)日:2021-03-04

    申请号:US16551597

    申请日:2019-08-26

    摘要: Methods, systems, and devices for architecture-based power management for a memory device are described. Aspects include operating a first memory bank within a memory device in a first mode and a second memory bank within the memory device in a second mode. The memory device may receive a power down command for the first memory bank while operating the first memory bank in the first mode and the second memory bank in the second mode and switch the first memory bank from the first mode to a first low power mode while maintaining the second memory bank in the second mode. The first low power mode corresponds to less power consumption by the first memory bank than the first mode. In some cases, switching the first memory bank from the first mode to the first low power mode includes deactivating circuitry dedicated to the first memory bank.

    Auto-referenced memory cell read techniques

    公开(公告)号:US10937491B2

    公开(公告)日:2021-03-02

    申请号:US16922883

    申请日:2020-07-07

    摘要: Methods, systems, and devices related to auto-referenced memory cell read techniques are described. The auto-referenced read may encode user data to include a certain number bits having a first logic state prior to storing the user data in memory cells. Subsequently, reading the encoded user data may be carried out by applying a read voltage to the memory cells while monitoring a series of switching events by activating a subset of the memory cells having the first logic state. The auto-referenced read may identify a particular switching event that correlates to a median threshold voltage value of the subset of the memory cells. Then, the auto-referenced read may determine a reference voltage that takes into account a statistical property of threshold voltage distribution of the subset of the memory cells. The auto-referenced read may identify a time duration to maintain the read voltage based on determining the reference voltage. When the time duration expires, the auto-referenced read may determine that the memory cells that have been activated correspond to the first logic state.

    AUTO-REFERENCED MEMORY CELL READ TECHNIQUES

    公开(公告)号:US20210020239A1

    公开(公告)日:2021-01-21

    申请号:US17062127

    申请日:2020-10-02

    摘要: Methods, systems, and devices related to auto-referenced memory cell read techniques are described. The auto-referenced read may encode user data to include a predetermined number of bits having a first logic state prior to storing the user data in memory cells. The auto-referenced read may store a total number of bits of the user data having a first logic state in a separate set of memory cells. Subsequently, reading the user data may be carried out by applying a read voltage to the memory cells storing the user data while monitoring a series of switching events by activating a subset of the memory cells having the first logic state. During the read operation, the auto-referenced read may compare the number of activated memory cells to either the predetermined number or the total number to determine whether all the bits having the first logic state has been detected. When the number of activated memory cells matches either the predetermined number or the total number, the auto-referenced read may determine that the memory cells that have been activated correspond to the first logic state.

    PROVIDING POWER AVAILABILITY INFORMATION TO MEMORY

    公开(公告)号:US20210020205A1

    公开(公告)日:2021-01-21

    申请号:US17062202

    申请日:2020-10-02

    IPC分类号: G11C5/14 G06F13/16

    摘要: The present disclosure includes apparatuses and methods for providing power availability information to memory. A number of embodiments include a memory and a controller. The controller is configured to provide power and power availability information to the memory, and the memory is configured to determine whether to adjust its operation based, at least in part, on the power availability information.

    Auto-referenced memory cell read techniques

    公开(公告)号:US10741243B2

    公开(公告)日:2020-08-11

    申请号:US16729061

    申请日:2019-12-27

    摘要: Methods, systems, and devices related to auto-referenced memory cell read techniques are described. The auto-referenced read may encode user data to include a certain number bits having a first logic state prior to storing the user data in memory cells. Subsequently, reading the encoded user data may be carried out by applying a read voltage to the memory cells while monitoring a series of switching events by activating a subset of the memory cells having the first logic state. The auto-referenced read may identify a particular switching event that correlates to a median threshold voltage value of the subset of the memory cells. Then, the auto-referenced read may determine a reference voltage that takes into account a statistical property of threshold voltage distribution of the subset of the memory cells. The auto-referenced read may identify a time duration to maintain the read voltage based on determining the reference voltage. When the time duration expires, the auto-referenced read may determine that the memory cells that have been activated correspond to the first logic state.

    PROVIDING POWER AVAILABILITY INFORMATION TO MEMORY

    公开(公告)号:US20190341083A1

    公开(公告)日:2019-11-07

    申请号:US16513115

    申请日:2019-07-16

    IPC分类号: G11C5/14 G06F13/16

    摘要: The present disclosure includes apparatuses and methods for providing power availability information to memory. A number of embodiments include a memory and a controller. The controller is configured to provide power and power availability information to the memory, and the memory is configured to determine whether to adjust its operation based, at least in part, on the power availability information.