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公开(公告)号:US11158577B2
公开(公告)日:2021-10-26
申请号:US16778346
申请日:2020-01-31
Applicant: Micron Technology, Inc.
Inventor: Biow Hiem Ong , David A. Daycock , Chieh Hsien Quek , Chii Wean Calvin Chen , Christian George Emor , Wing Yu Lo
IPC: H01L23/535 , H01L21/768 , H01L23/522 , H01L23/528 , H01L23/532 , H01L27/11526 , H01L27/11582 , H01L27/11556
Abstract: Methods for forming microelectronic devices include forming a staircase structure in a stack structure having a vertically alternating sequence of insulative and conductive materials arranged in tiers. Steps are at lateral ends of the tiers. Contact openings of different aspect ratios are formed in fill material adjacent the staircase structure, with some openings terminating in the fill material and others exposing portions of the conductive material of upper tiers of the stack structure. Additional conductive material is selectively formed on the exposed portions of the conductive material. The contact openings initially terminating in the fill material are extended to expose portions of the conductive material of lower elevations. Contacts are formed, with some extending to the additional conductive material and others extending to conductive material of the tiers of the lower elevations. Microelectronic devices and systems incorporating such staircase structures and contacts are also disclosed.
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公开(公告)号:US11967556B2
公开(公告)日:2024-04-23
申请号:US17452113
申请日:2021-10-25
Applicant: Micron Technology, Inc.
Inventor: Biow Hiem Ong , David A. Daycock , Chieh Hsien Quek , Chii Wean Calvin Chen , Christian George Emor , Wing Yu Lo
IPC: H01L23/535 , H01L21/768 , H01L23/522 , H01L23/528 , H01L23/532 , H10B41/27 , H10B41/40 , H10B43/27
CPC classification number: H01L23/535 , H01L21/76805 , H01L21/76816 , H01L21/76843 , H01L21/76877 , H01L21/76895 , H01L23/5226 , H01L23/5283 , H01L23/53266 , H10B41/40 , H10B41/27 , H10B43/27
Abstract: Methods for forming microelectronic devices include forming a staircase structure in a stack structure having a vertically alternating sequence of insulative and conductive materials arranged in tiers. Steps are at lateral ends of the tiers. Contact openings of different aspect ratios are formed in fill material adjacent the staircase structure, with some openings terminating in the fill material and others exposing portions of the conductive material of upper tiers of the stack structure. Additional conductive material is selectively formed on the exposed portions of the conductive material. The contact openings initially terminating in the fill material are extended to expose portions of the conductive material of lower elevations. Contacts are formed, with some extending to the additional conductive material and others extending to conductive material of the tiers of the lower elevations. Microelectronic devices and systems incorporating such staircase structures and contacts are also disclosed.
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公开(公告)号:US20210242131A1
公开(公告)日:2021-08-05
申请号:US16778346
申请日:2020-01-31
Applicant: Micron Technology, Inc.
Inventor: Biow Hiem Ong , David A. Daycock , Chieh Hsien Quek , Chii Wean Calvin Chen , Christian George Emor , Wing Yu Lo
IPC: H01L23/535 , H01L21/768 , H01L23/528 , H01L23/532 , H01L23/522 , H01L27/11582 , H01L27/11556
Abstract: Methods for forming microelectronic devices include forming a staircase structure in a stack structure having a vertically alternating sequence of insulative and conductive materials arranged in tiers. Steps are at lateral ends of the tiers. Contact openings of different aspect ratios are formed in fill material adjacent the staircase structure, with some openings terminating in the fill material and others exposing portions of the conductive material of upper tiers of the stack structure. Additional conductive material is selectively formed on the exposed portions of the conductive material. The contact openings initially terminating in the fill material are extended to expose portions of the conductive material of lower elevations. Contacts are formed, with some extending to the additional conductive material and others extending to conductive material of the tiers of the lower elevations. Microelectronic devices and systems incorporating such staircase structures and contacts are also disclosed.
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