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    Accurate alignment of semiconductor devices and sockets
    1.
    发明申请
    Accurate alignment of semiconductor devices and sockets 审中-公开
    半导体器件和插座的精确对准

    公开(公告)号：US20080238460A1

    公开(公告)日：2008-10-02

    申请号：US11731777

    申请日：2007-03-30

    申请人： Lothar Kress ,  Wei-ming Chi ,  Pooya Tadayon

    发明人： Lothar Kress ,  Wei-ming Chi ,  Pooya Tadayon

    IPC分类号： G01R31/02

    CPC分类号： G01R31/2891 ,  G01R1/0433

    摘要： Methods and apparatus to provide accurate alignment for semiconductor sockets are described. In one embodiment, a carrier is utilized to align a device under test with a test socket. In some embodiments, alignment features on a carrier, a device under test, and/or a test socket are used to align the devices relative to each other.

    摘要翻译： 描述了为半导体插座提供精确对准的方法和装置。 在一个实施例中，使用载体来将被测设备与测试插座对准。 在一些实施例中，使用载体，被测设备和/或测试插座上的对准特征来相对于彼此对准设备。

    Sort interface unit having probe capacitors
    4.
    发明申请
    Sort interface unit having probe capacitors 审中-公开
    对具有探针电容器的接口单元进行排序

    公开(公告)号：US20060038576A1

    公开(公告)日：2006-02-23

    申请号：US10922323

    申请日：2004-08-19

    申请人： Pooya Tadayon

    发明人： Pooya Tadayon

    IPC分类号： G01R31/02

    CPC分类号： G01R1/06766

    摘要： Briefly, in accordance with one embodiment of the invention, a sort interface unit of a wafer tester may include a micro-electromechanical system (MEMS) capacitor disposed between selected pairs of the probe tips of the sort interface unit, for example between power and ground probes. In one embodiment, the MEMS capacitor may be disposed at the ends of the probe tips nearer the wafer when the wafer is tested by the wafer tester. In another embodiment, a first capacitor having a higher value may be used for higher power circuits on the wafer, and a second capacitor having a lower value may be used for lower power circuits on the wafer. In such an arrangement, the capacitors on the probes of the sort interface unit may be selected according to a spatial power distribution of the power of the circuit or circuits on the wafer.

    摘要翻译： 简而言之，根据本发明的一个实施例，晶片测试器的分类接口单元可以包括设置在分类接口单元的选定对的探针尖端之间的微机电系统（MEMS）电容器，例如在电源和地之间 探针。 在一个实施例中，当通过晶片测试器测试晶片时，MEMS电容器可以设置在靠近晶片的探针尖端的端部。 在另一个实施例中，具有较高值的​​第一电容器可用于晶片上的较高功率电路，并且具有较低值的第二电容器可用于晶片上的较低功率电路。 在这种布置中，可以根据晶片上的电路或电路的功率的空间功率分布来选择分类接口单元的探针上的电容​​器。

    CHEVRON INTERCONNECT FOR VERY FINE PITCH PROBING
    6.
    发明申请
    CHEVRON INTERCONNECT FOR VERY FINE PITCH PROBING 审中-公开

    公开(公告)号：US20190004089A1

    公开(公告)日：2019-01-03

    申请号：US15640415

    申请日：2017-06-30

    申请人： Pooya Tadayon

    发明人： Pooya Tadayon

    IPC分类号： G01R1/067 ,  G01R1/073 ,  G01R31/28

    摘要： An apparatus an apparatus comprising: a substrate having a plane; and an array of at least one conductive probe having a base affixed to the substrate, the at least one conductive probe having a major axis extending from the plane of the substrate and terminating at a tip, wherein the one or more conductive probes comprise at least three points that are non-collinear.