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    SELECTIVE DEPOSITION OF SiN ON HORIZONTAL SURFACES
    3.
    发明申请
    SELECTIVE DEPOSITION OF SiN ON HORIZONTAL SURFACES 审中-公开

    公开(公告)号：US20190043876A1

    公开(公告)日：2019-02-07

    申请号：US16052401

    申请日：2018-08-01

    申请人： Lam Research Corporation

    发明人： Bart J. van Schravendijk ,  Awnish Gupta ,  Patrick A. van Cleemput ,  Jason Daejin Park

    IPC分类号： H01L27/11556 ,  H01L27/11582 ,  G11C16/04

    摘要： Methods and apparatuses for selectively depositing silicon nitride (SiN) via high-density plasma chemical vapor deposition (HDP CVD) to form a SiN pad on an exposed flat surface of a nitride layer in a 3D NAND staircase structure with alternating oxide and nitride layers are provided. In some embodiments, selective etching is performed to remove undesirable buildup of SiN on sidewalls of the oxide layers of the staircase structure. Nitride layers of the staircase structure are replaced with tungsten (W) to form tungsten wordlines, while the SiN pads are replaced with tungsten to from landing pads, which prevent punchthrough of the tungsten wordlines on the staircase structure by interconnects extending thereto.

    Selective carbon deposition
    4.
    发明授权
    Selective carbon deposition 有权

    公开(公告)号：US12037686B2

    公开(公告)日：2024-07-16

    申请号：US17622019

    申请日：2020-06-22

    申请人： LAM RESEARCH CORPORATION

    发明人： Awnish Gupta ,  Adrien Lavoie ,  Bart J. Van Schravendijk ,  Samantha SiamHwa Tan

    IPC分类号： C23C16/26 ,  C23C16/455

    CPC分类号： C23C16/45536 ,  C23C16/26 ,  C23C16/45534

    摘要： A method for depositing carbon on a substrate in a processing chamber includes arranging the substrate on a substrate support in the processing chamber. The substrate includes a carbon film having a first thickness formed on at least one underlying layer of the substrate. The method further includes performing a first etching step to etch the substrate to form features on the substrate, remove portions of the carbon film, and decrease the first thickness of the carbon film, selectively depositing carbon onto remaining portions of the carbon film, and performing at least one second etching step to etch the substrate to complete the forming of the features on the substrate.

    IN-FEATURE WET ETCH RATE RATIO REDUCTION
    7.
    发明公开
    IN-FEATURE WET ETCH RATE RATIO REDUCTION 审中-公开

    公开(公告)号：US20230220544A1

    公开(公告)日：2023-07-13

    申请号：US18000562

    申请日：2021-06-01

    申请人： Lam Research Corporation

    发明人： Awnish Gupta ,  Ian John Curtin ,  Douglas Walter Agnew ,  Frank Loren Pasquale ,  Eli Jeon ,  Adrien LaVoie

    IPC分类号： C23C16/40 ,  C23C16/455

    CPC分类号： C23C16/401 ,  C23C16/45527 ,  C23C16/45557 ,  C23C16/45553

    摘要： Various embodiments herein relate to methods and apparatus for depositing silicon oxide using thermal ALD or thermal CVD. In one aspect of the disclosed embodiments, a method for depositing silicon oxide is provided, the method including: (a) receiving the substrate in a reaction chamber; (b) introducing a first flow of a first reactant into the reaction chamber and exposing the substrate to the first reactant, where the first reactant includes a silicon-containing reactant; (c) introducing a second flow of a second reactant into the reaction chamber to cause a reaction between the first reactant and the second reactant, (i) where the second reactant includes hydrogen (H2) and an oxygen-containing reactant, (ii) where the reaction deposits silicon oxide on the substrate, and (iii) where the reaction is initiated when a pressure in the reaction chamber is greater than 10 Torr and equal to or less than about 40 Torr.

    NON-PLASMA ENHANCED DEPOSITION FOR RECESS ETCH MATCHING
    8.
    发明申请
    NON-PLASMA ENHANCED DEPOSITION FOR RECESS ETCH MATCHING 有权

    公开(公告)号：US20230087976A1

    公开(公告)日：2023-03-23

    申请号：US17802525

    申请日：2021-02-25

    申请人： Lam Research Corporation

    发明人： Ian John Curtin ,  Douglas Walter Agnew ,  Mamoru Imade ,  Joseph R. Abel ,  Awnish Gupta ,  Adrien Lavoie

    IPC分类号： H01L29/76

    摘要： A NAND structure and method of fabricating the structure are described. A multi-layer ONON stack is deposited on a Si substrate and a field oxide grown thereon. A portion of the field oxide is removed, and high-aspect-ratio channels are etched in the stack. The channels are filled with a Si oxide using a thermal ALD process. The thermal ALD process includes multiple growth cycles followed by a passivation cycle. Each growth cycle includes treating the surface oxide surface using an inhibitor followed by multiple cycles to deposit the oxide on the treated surface using a precursor and source of the oxide. The passivation after the growth cycle removes the residual inhibitor. The Si oxide is recess etched using a wet chemical etch of DHF and then capped using a poly-Si cap.