公开(公告)号：US20080318454A1

公开(公告)日：2008-12-25

申请号：US11766204

申请日：2007-06-21

Applicant: Chen-Fa Wu ,  Chih-Nan Lin ,  Kuo-Ching Huang ,  Chin-An Huang

Inventor： Chen-Fa Wu ,  Chih-Nan Lin ,  Kuo-Ching Huang ,  Chin-An Huang

IPC: H01R12/16

CPC classification number: H05K1/0271 ,  H05K2201/044 ,  H05K2201/09063 ,  H05K2201/10409 ,  H05K2201/10734

Abstract: An information handling system circuit board has an opening formed through it proximate a coupling point of an integrated circuit to the circuit board. The opening manages stress at the coupling point of the integrated circuit to the circuit board to reduce the risk of damage to the coupling point during deformation of the circuit board, such as when the circuit board is coupled to a chassis or when a component is pressed into the circuit board. In one embodiment, rectangular openings are formed at diagonally opposed corners of a BSA integrated circuit. In alternative embodiments, openings of varying shape, such as slots or curved slots, are formed at selected corners of the integrated circuit.

Abstract translation: 信息处理系统电路板具有通过其形成的开口，其靠近集成电路到电路板的耦合点。 开口处理集成电路到电路板的耦合点处的应力，以减少在电路板变形期间对耦合点的损坏的风险，例如当电路板耦合到底盘或当部件被按压时 进入电路板。 在一个实施例中，在BSA集成电路的对角相对的角上形成矩形开口。 在替代实施例中，在集成电路的选定角处形成变化形状的开口，例如槽或弯曲槽。

公开(公告)号：US20060061837A1

公开(公告)日：2006-03-23

申请号：US10904740

申请日：2004-11-24

Applicant: Kuo-Ching Huang ,  Yu-Cheng Chang

Inventor： Kuo-Ching Huang ,  Yu-Cheng Chang

IPC: H04N1/23

CPC classification number: H04N1/1013 ,  H04N2201/0406 ,  H04N2201/0408 ,  H04N2201/0422

Abstract: A clamp for fixing a photographic slide and/or a photographic negative includes a carrier and a cover for fixing the slide or negative onto the carrier. The carrier includes a first guide for holding the negative, and a second guide extended from the first guide for holding the photographic slide.

Abstract translation: 用于固定照相底片和/或照相底片的夹具包括用于将滑块或阴极固定到载体上的载体和盖。 载体包括用于保持负片的第一引导件和从第一引导件延伸以保持照相载玻片的第二引导件。

公开(公告)号：US08853021B2

公开(公告)日：2014-10-07

申请号：US13273012

申请日：2011-10-13

Applicant: Yu-Wei Ting ,  Kuo-Ching Huang

Inventor： Yu-Wei Ting ,  Kuo-Ching Huang

IPC: H01L21/336 ,  H01L29/78 ,  H01L29/66 ,  H01L27/108

CPC classification number: H01L27/10823 ,  H01L27/10808 ,  H01L27/10876 ,  H01L29/0649 ,  H01L29/66621 ,  H01L29/78

Abstract: An embedded transistor for an electrical device, such as a DRAM memory cell, and a method of manufacture thereof is provided. A trench is formed in a substrate and a gate dielectric and a gate electrode formed in the trench of the substrate. Source/drain regions are formed in the substrate on opposing sides of the trench. In an embodiment, one of the source/drain regions is coupled to a storage node and the other source/drain region is coupled to a bit line. In this embodiment, the gate electrode may be coupled to a word line to form a DRAM memory cell.

Abstract translation: 提供了一种用于电气设备的嵌入式晶体管，例如DRAM存储单元及其制造方法。 在衬底中形成沟槽，并且在衬底的沟槽中形成栅极电介质和栅电极。 源极/漏极区域形成在沟槽的相对侧上的衬底中。 在一个实施例中，源极/漏极区域中的一个耦合到存储节点，而另一个源极/漏极区域耦合到位线。 在该实施例中，栅电极可以耦合到字线以形成DRAM存储单元。

公开(公告)号：US08825122B2

公开(公告)日：2014-09-02

申请号：US13239359

申请日：2011-09-21

Applicant: Che-Hung Huang ,  Kuo-Ching Huang ,  Chih-Ling Chien

Inventor： Che-Hung Huang ,  Kuo-Ching Huang ,  Chih-Ling Chien

IPC: H05K7/00 ,  G06F1/16 ,  H05K5/02 ,  H04M1/02

CPC classification number: G06F1/1624 ,  H04M1/0237 ,  H04M1/0239

Abstract: A hand-held device includes a first body, a second body, a sliding module, and a guiding module. The sliding module is disposed between the first body and the second body, so that the second body is able to be slid on a two-dimensional plane relative to the first body. The guiding module includes a first guiding part and a second guiding part. The first guiding part is fixed to the first body. The second guiding part is fixed to the second body and coupled to the first guiding part. Besides, the second guiding part is able to be moved along a guiding path relative to the first guiding part, so that the second body is able to be slid along the guiding path on the two-dimensional plane relative to the first body.

Abstract translation: 手持式装置包括第一主体，第二主体，滑动模块和引导模块。 滑动模块设置在第一主体和第二主体之间，使得第二主体能够相对于第一主体在二维平面上滑动。 引导模块包括第一引导部分和第二引导部分。 第一个引导部分固定在第一个身体。 第二引导部分固定到第二主体并且联接到第一引导部分。 此外，第二引导部能够相对于第一引导部沿着引导路径移动，使得第二主体能够相对于第一主体沿着二维平面上的引导路径滑动。

公开(公告)号：US07847847B2

公开(公告)日：2010-12-07

申请号：US11044922

申请日：2005-01-27

Applicant: Dun-Nian Yaung ,  Kuo-Ching Huang ,  Ho-Ching Chien ,  Shou-Gwo Wuu

Inventor： Dun-Nian Yaung ,  Kuo-Ching Huang ,  Ho-Ching Chien ,  Shou-Gwo Wuu

IPC: H04N3/14 ,  H04N5/335

CPC classification number: H04N5/361 ,  H01L27/14603 ,  H01L27/14609 ,  H01L27/14643 ,  H01L27/14689 ,  H04N5/3559 ,  H04N5/374 ,  H04N5/37452

Abstract: A CMOS image sensor having increased capacitance that allows a photo-diode to generate a larger current is provided. The increased capacitance reduces noise and the dark signal. The image sensor utilizes a transistor having nitride spacers formed on a buffer oxide layer. Additional capacitance may be provided by various capacitor structures, such as a stacked capacitor, a planar capacitor, a trench capacitor, a MOS capacitor, a MIM/PIP capacitor, or the like. Embodiments of the present invention may be utilized in a 4-transistor pixel or a 3-transistor pixel configuration.

Abstract translation: 提供了具有允许光电二极管产生较大电流的增加的电容的CMOS图像传感器。 增加的电容可以降低噪声和暗信号。 图像传感器利用形成在缓冲氧化物层上的具有氮化物间隔物的晶体管。 附加电容可以由诸如叠层电容器，平面电容器，沟槽电容器，MOS电容器，MIM / PIP电容器等的各种电容器结构来提供。 本发明的实施例可以用于4-晶体管像素或3-晶体管像素配置。

公开(公告)号：US20090051034A1

公开(公告)日：2009-02-26

申请号：US11892103

申请日：2007-08-20

Applicant: Chih-Yang Pai ,  Yuan-Hung Liu ,  Michael Kuang ,  Kuo-Ching Huang

Inventor： Chih-Yang Pai ,  Yuan-Hung Liu ,  Michael Kuang ,  Kuo-Ching Huang

IPC: H01L23/52 ,  H01L21/44

CPC classification number: H01L27/10888 ,  H01L21/76844

Abstract: A method for forming a semiconductor device is provided. The method includes the following steps. A substrate having a first contact is provided. A layered structure is formed on the substrate. A recess is formed into the layered structure to expose at least a portion of the first contact. A glue layer is formed on the layered structure and the at least a portion of the first contact. The glue layer is removed from the at least a portion of the first contact. A second contact is formed contacting the first contact and the glue layer.

Abstract translation: 提供一种形成半导体器件的方法。 该方法包括以下步骤。 提供具有第一触点的基板。 在基板上形成层状结构。 形成层状结构中的凹部以暴露第一接触件的至少一部分。 在层状结构和第一接触的至少一部分上形成胶层。 胶层从第一接触件的至少一部分去除。 形成接触第一接触和胶层的第二接触。

公开(公告)号：US20070187139A1

公开(公告)日：2007-08-16

申请号：US11668331

申请日：2007-01-29

Applicant: Kuo-Ching Huang ,  Yu-Cheng Chang

Inventor： Kuo-Ching Huang ,  Yu-Cheng Chang

IPC: H05K1/00

CPC classification number: H05K1/147 ,  H04N1/00519 ,  H04N1/1017 ,  H04N1/193 ,  H04N2201/0081 ,  H05K1/144 ,  H05K2201/09109

Abstract: A bus structure includes multiple soft buses and a soft separation layer. These multiple soft buses are stacked side by side each other. The soft separation layer is sandwitched between two adjacent soft buses.

Abstract translation: 总线结构包括多个软总线和软分离层。 这些多条软总线并排堆叠。 软分离层在两个相邻的软总线之间被切换。

公开(公告)号：US20060048969A1

公开(公告)日：2006-03-09

申请号：US11136558

申请日：2005-05-25

Applicant: Kuo-Ching Huang ,  Yu-Cheng Chang

Inventor： Kuo-Ching Huang ,  Yu-Cheng Chang

IPC: H05K1/03

CPC classification number: H05K1/147 ,  H04N1/00519 ,  H04N1/1017 ,  H04N1/193 ,  H04N2201/0081 ,  H05K1/144 ,  H05K2201/09109

Abstract: A bus structure includes multiple soft buses and a soft separation layer. These multiple soft buses are stacked side by side each other. The soft separation layer is sandwitched between two adjacent soft buses.

Abstract translation: 总线结构包括多个软总线和软分离层。 这些多条软总线并排堆叠。 软分离层在两个相邻的软总线之间被切换。

公开(公告)号：US06373369B2

公开(公告)日：2002-04-16

申请号：US09839927

申请日：2001-04-23

Applicant: Kuo-Ching Huang ,  Jin-Yuan Lee ,  Tse-Liang Ying

Inventor： Kuo-Ching Huang ,  Jin-Yuan Lee ,  Tse-Liang Ying

IPC: H01F500

CPC classification number: H01F5/003

Abstract: An improved thin film inductor design is described. A spiral geometry is used to which has been added a core of high permeability material located at the center of the spiral. If the high permeability material is a conductor, care must be taken to avoid any contact between the core and the spiral. If a dielectric ferromagnetic material is used, this constraint is removed from the design. Several other embodiments are shown in which, in addition to the high permeability core, provide low reluctance paths for the structure. In one case this takes the form of a frame of ferromagnetic material surrounding the spiral while in a second case it has the form of a hollow square located directly above the spiral.

Abstract translation: 描述了改进的薄膜电感器设计。 使用螺旋几何形状，其中已经添加了位于螺旋中心的高磁导率材料的核心。 如果高导磁率材料是导体，则必须注意避免芯和螺旋之间的任何接触。 如果使用介电铁磁材料，则从设计中去除该约束。 示出了其中除了高磁导率芯之外还提供用于结构的低磁阻路径的其它实施例。 在一种情况下，这采取围绕螺旋的铁磁材料框架的形式，而在第二种情况下，其具有直接位于螺旋上方的中空正方形的形式。

公开(公告)号：US06214715B1

公开(公告)日：2001-04-10

申请号：US09349841

申请日：1999-07-08

Applicant: Kuo-Ching Huang ,  Tse-Liang Ying ,  Wen-Chuan Chiang

Inventor： Kuo-Ching Huang ,  Tse-Liang Ying ,  Wen-Chuan Chiang

IPC: H01L2144

CPC classification number: H01L27/10855 ,  H01L21/76897 ,  H01L27/10885 ,  H01L28/91 ,  H01L28/92

Abstract: This invention provides a method for forming a self aligned contact without key holes using a two step sidewall spacer deposition. The process begins by providing a semiconductor structure having a device layer, a first inter poly oxide layer (IPO-1), and a conductive structure (such as a bit line) thereover, and having a contact area on the device layer adjacent to the conductive structure. The semiconductor structure can further include an optional etch stop layer overlying the first inter poly oxide layer. The conductive structure comprises at least one conductive layer with a hard mask thereover. A first spacer layer is formed over the hard mask and the IPO-1 layer and anisotropically etched to form first sidewall spacers on the sidewalls of the conductive structure up to a level above the bottom of the hard mask and below the level of the top of the hard mask such that the profile of the first sidewall spacers are not concave at any point. A second spacer layer is formed over the first sidewall spacers and anisotropically etched to form second sidewall spacers, having a profile that is not concave at any point. A second inter poly oxide layer is formed over the second sidewall spacers, the hard mask, and the IPO-1 layer, whereby the second inter poly oxide layer is free from key holes. A contact opening is formed in the second inter poly oxide layer and the first inter poly oxide layer over the contact area. A contact plug is formed in the contact openings.

Abstract translation: 本发明提供一种用于使用两步侧壁间隔物沉积形成无键孔的自对准接触的方法。 该过程开始于提供具有器件层，第一多晶硅氧化物层（IPO-1）和导电结构（例如位线）的半导体结构，并且在与其相邻的器件层上具有接触区域 导电结构。 半导体结构还可以包括覆盖在第一多晶硅氧化物层上的任选的蚀刻停止层。 导电结构包括至少一个具有硬掩模的导电层。 在硬掩模和IPO-1层上形成第一间隔层，并且各向异性蚀刻以在导电结构的侧壁上形成直到硬掩模的底部以上的水平并且低于 硬掩模，使得第一侧壁隔片的轮廓在任何点都不是凹的。 第二间隔层形成在第一侧壁间隔物上并且各向异性蚀刻以形成第二侧壁间隔物，其具有在任何点处不凹的轮廓。 在第二侧壁间隔物，硬掩模和IPO-1层上形成第二多晶硅氧化物层，由此第二多晶氧化物层没有键孔。 在接触区域上的第二多晶氧化物层和第一多晶氧化物层中形成接触开口。 在接触开口中形成接触塞。