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1.
公开(公告)号:US11705210B2
公开(公告)日:2023-07-18
申请号:US17570676
申请日:2022-01-07
Applicant: Kioxia Corporation
Inventor: Akio Sugahara , Takaya Handa , Ryosuke Isomura , Kazuto Uehara , Junichi Sato , Norichika Asaoka , Masashi Yamaoka , Bushnaq Sanad , Yuzuru Shibazaki , Noriyasu Kumazaki , Yuri Terada
CPC classification number: G11C16/30 , G11C16/0483 , G11C16/08 , G11C16/32 , G11C16/12 , G11C16/26 , H10B69/00
Abstract: A memory device includes a memory cell array, a voltage generation circuit generating one or more voltages supplied to the memory cell array, an input/output circuit receiving an address indicating a region in the memory cell array and a control circuit controlling operations of the memory cell array. The voltage generation circuit generates the voltages before a ready/busy signal changing from a ready state to a busy state.
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2.
公开(公告)号:US12159677B2
公开(公告)日:2024-12-03
申请号:US18205915
申请日:2023-06-05
Applicant: Kioxia Corporation
Inventor: Akio Sugahara , Takaya Handa , Ryosuke Isomura , Kazuto Uehara , Junichi Sato , Norichika Asaoka , Masashi Yamaoka , Bushnaq Sanad , Yuzuru Shibazaki , Noriyasu Kumazaki , Yuri Terada
Abstract: A memory device includes a memory cell array, a voltage generation circuit generating one or more voltages supplied to the memory cell array, an input/output circuit receiving an address indicating a region in the memory cell array, and a control circuit controlling operations of the memory cell array. The control circuit supplies a non-selection voltage of the voltages before a ready/busy signal changes from a ready state to a busy state.
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