公开(公告)号：US08081814B2

公开(公告)日：2011-12-20

申请号：US12393797

申请日：2009-02-26

Applicant: Hiroshi Matsushita ,  Kenichi Kadota ,  Toshiyuki Aritake

Inventor： Hiroshi Matsushita ,  Kenichi Kadota ,  Toshiyuki Aritake

IPC: G06K9/00 ,  G01N21/00

CPC classification number: G06K9/4604 ,  G06T7/0004 ,  G06T2207/20021 ,  G06T2207/30148

Abstract: The present invention provides a linear pattern detection method which can extract and detect linear patterns distinguished by a microscopic defect distribution profile even if skipped measurements are taken. The linear pattern detection method acquires a defect map created based on results of defect inspection of a wafer; divides the defect map into a plurality of first segments; calculates a correlation coefficient of a point sequence in each of the first segments, the point sequence corresponding to a defect group contained in the first segments; calculates a total number of those first segments in which the correlation coefficient is equal to or larger than a first threshold; and determines that the wafer contains a linear pattern if the total number is equal to or larger than a second threshold.

Abstract translation: 本发明提供一种线性图案检测方法，其可以提取和检测由微观缺陷分布轮廓区分的线性图案，即使进行了跳过的测量。 线性图案检测方法获取基于晶片的缺陷检查结果创建的缺陷图; 将缺陷图划分成多个第一段; 计算每个第一段中的点序列的相关系数，对应于包含在第一段中的缺陷组的点序列; 计算相关系数等于或大于第一阈值的那些第一段的总数; 并且如果总数等于或大于第二阈值，则确定晶片包含线性模式。

公开(公告)号：US07062409B2

公开(公告)日：2006-06-13

申请号：US10670330

申请日：2003-09-26

Applicant: Kenichi Kadota

Inventor： Kenichi Kadota

IPC: G06F15/00

CPC classification number: G06F11/008

Abstract: A method of detecting failure of manufacturing apparatuses has: identifying a low-yield-period apparatus having a significantly lower yield period compared with other manufacturing apparatus and the significantly lower yield period by comparing yields of a plurality of manufacturing apparatuses used in parallel in a specific manufacturing process for each time period when the manufacturing apparatuses were used; identifying a downward-tendency apparatus having a significant downward tendency in yield compared with the other manufacturing apparatus by comparing recent yield trends of the plurality of manufacturing apparatuses; and issuing multi-level warnings to the low-yield-period apparatus and the downward-tendency apparatus.

Abstract translation: 检测制造装置的故障的方法具有以下步骤：通过将特定的并行使用的多个制造装置的产量进行比较，来识别与其他制造装置相比具有显着较低的产量周期的低收益期装置和显着较低的收益周期 使用制造装置的每个时间段的制造过程; 通过比较多个制造装置的近期产量趋势，识别与其他制造装置相比，产量显着下降趋势的向下倾斜装置; 并向低产量期间装置和向下倾向装置发出多级警告。

公开(公告)号：US07043384B2

公开(公告)日：2006-05-09

申请号：US10784819

申请日：2004-02-24

Applicant: Hiroshi Matsushita ,  Kenichi Kadota ,  Yoshiyuki Shioyama

Inventor： Hiroshi Matsushita ,  Kenichi Kadota ,  Yoshiyuki Shioyama

IPC: G01R31/28 ,  G01R31/00

CPC classification number: G11C29/006 ,  G01R31/01 ,  G11C29/56 ,  G11C2029/0403 ,  G11C2029/5604

Abstract: A failure detection system includes a wafer test information input unit which acquires pass/fail maps for wafers for a plurality of types of semiconductor devices, displaying failure chip areas based on results of electrical tests performed on chips; an analogous test information input unit which classifies the electrical tests into analogous electrical tests with regard to analogous failures among the semiconductor devices; a subarea setting unit which assigns subareas common to the types of semiconductor devices on a wafer surface; a characteristic quantity calculation unit which statistically calculates characteristic quantities based on a number of the failure chip areas included in the subareas for each analogous electrical test; and a categorization unit which obtains correlation coefficients between the characteristic quantities corresponding to the subareas, and classifies clustering failure patterns of the failure chip areas into categories by comparing the correlation coefficients with a threshold.

Abstract translation: 故障检测系统包括晶片测试信息输入单元，其获取多种类型的半导体器件的晶片的通过/失败映射，基于对芯片执行的电测试的结果显示故障芯片区域; 类似的测试信息输入单元，其将电测试分类为关于半导体器件中的类似故障的类似电测试; 子区域设定单元，其在晶片表面上分配与所述半导体器件的类型相同的子区域; 特征量计算单元，其基于每个类似电测试在所述子区域中包括的故障码片区域的数量来统计计算特征量; 以及分类单元，其获得与所述子区域相对应的特征量之间的相关系数，并且通过将所述相关系数与阈值进行比较来将所述故障码片区域的聚类故障模式分类。

公开(公告)号：US20050021299A1

公开(公告)日：2005-01-27

申请号：US10670330

申请日：2003-09-26

Applicant: Kenichi Kadota

Inventor： Kenichi Kadota

IPC: H01L21/02 ,  G06F11/30

CPC classification number: G06F11/008

Abstract: A method of detecting failure of manufacturing apparatuses has: identifying a low-yield-period apparatus having a significantly lower yield period compared with other manufacturing apparatus and the significantly lower yield period by comparing yields of a plurality of manufacturing apparatuses used in parallel in a specific manufacturing process for each time period when the manufacturing apparatuses were used; identifying a downward-tendency apparatus having a significant downward tendency in yield compared with the other manufacturing apparatus by comparing recent yield trends of the plurality of manufacturing apparatuses; and issuing multi-level warnings to the low-yield-period apparatus and the downward-tendency apparatus.

Abstract translation: 检测制造装置的故障的方法具有以下步骤：通过将特定的并行使用的多个制造装置的产量进行比较，来识别与其他制造装置相比具有显着较低的产量周期的低收益期装置和显着较低的收益周期 使用制造装置的每个时间段的制造过程; 通过比较多个制造装置的近期产量趋势，识别与其他制造装置相比，产量显着下降趋势的向下倾斜装置; 并向低产量期间装置和向下倾向装置发出多级警告。

公开(公告)号：US07405088B2

公开(公告)日：2008-07-29

申请号：US10801992

申请日：2004-03-17

Applicant: Hiroshi Matsushita ,  Kenichi Kadota ,  Kenji Kawabata ,  Yoshiyuki Shioyama

Inventor： Hiroshi Matsushita ,  Kenichi Kadota ,  Kenji Kawabata ,  Yoshiyuki Shioyama

IPC: H01L21/00

CPC classification number: H01L22/20

Abstract: A failure analysis method according to the invention includes inputting the positions of failures in multiple wafers of an input device; preparing multiple sections in the multiple wafers; calculating feature amounts, which are represented by at least one numerical value representing a distribution of the failures in the multiple wafers, for each of the multiple sections; and representing by a first numerical value, the degree of similarity between the multiple wafers in terms of the feature amounts. Subsequently, the method includes detecting another wafer, which has the first numerical value greater than a predetermined first threshold, for each of the multiple wafers and forming a similar wafer group of multiple wafers with similar distributions of the failures.

Abstract translation: 根据本发明的故障分析方法包括在输入设备的多个晶片中输入故障的位置; 准备多个晶片的多个部分; 计算特征量，其由表示多个晶片中的故障的分布的至少一个数值表示，用于多个部分中的每一个; 并且通过第一数值表示在特征量方面的多个晶片之间的相似度。 随后，该方法包括对于每个多个晶片检测具有大于预定第一阈值的第一数值的另一个晶片，并且形成具有类似故障分布的多个晶片的相似晶片组。

公开(公告)号：US20080011947A1

公开(公告)日：2008-01-17

申请号：US11730818

申请日：2007-04-04

Applicant: Hiroyuki Hayashi ,  Takamitsu Nagai ,  Tomonobu Noda ,  Kenichi Kadota ,  Hisaki Kozaki

Inventor： Hiroyuki Hayashi ,  Takamitsu Nagai ,  Tomonobu Noda ,  Kenichi Kadota ,  Hisaki Kozaki

IPC: G01N23/00 ,  H01L21/66

CPC classification number: H01L22/14 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor substrate inspection method includes: generating a charged particle beam, and irradiating the charged particle beam to a semiconductor substrate in which contact wiring lines are formed on a surface thereof, the contact wiring lines of the semiconductor substrate being designed to alternately repeat in a plane view so that one of the adjacent contact wiring lines is grounded to the semiconductor substrate and the other of the adjacent contact wiring lines is insulated from the semiconductor substrate; detecting at least one of a secondary charged particle, a reflected charged particle and a back scattering charged particle generated from the surface of the semiconductor substrate to acquire a signal; generating an inspection image with the signal, the inspection image showing a state of the surface of the semiconductor substrate; and judging whether the semiconductor substrate is good or bad from a difference of brightness in the inspection image obtained from the surfaces of the adjacent contact wiring lines.

Abstract translation: 半导体衬底检查方法包括：产生带电粒子束，并将带电粒子束照射到其表面上形成有接触布线的半导体衬底，半导体衬底的接触布线被设计成在 平面图，使得相邻的接触布线中的一个接地到半导体基板，并且相邻的接触布线中的另一个与半导体基板绝缘; 检测从半导体衬底的表面产生的二次带电粒子，反射带电粒子和反向散射带电粒子中的至少一个，以获得信号; 产生具有信号的检查图像，检查图像显示半导体基板的表面的状态; 以及从相邻接触布线的表面获得的检查图像中的亮度差来判断半导体基板是否良好。

公开(公告)号：US20050194590A1

公开(公告)日：2005-09-08

申请号：US11068778

申请日：2005-03-02

Applicant: Hiroshi Matsushita ,  Tomonobu Noda ,  Kenichi Kadota ,  Junji Sugamoto ,  Yukihiro Ushiku

Inventor： Hiroshi Matsushita ,  Tomonobu Noda ,  Kenichi Kadota ,  Junji Sugamoto ,  Yukihiro Ushiku

IPC: H01L21/66 ,  G01R31/26 ,  H01L21/02 ,  H01L23/58

CPC classification number: H01L22/20 ,  G01R31/2894 ,  G05B23/0248 ,  G05B2219/31357 ,  Y02P90/14

Abstract: A control system for a manufacturing apparatus includes manufacturing information input unit acquiring time series data of apparatus parameters controlling manufacturing apparatuses; failure pattern classification module classifying in-plane distributions of failures of each of the wafers into failure patterns; an index calculation unit configured to statistically process the time series data by algorithms to calculate indices corresponding to the respective algorithms; an index analysis unit providing first and second frequency distributions of the indices categorized with and without the target failure pattern, to implement significance test between the first and second frequency distributions; and an abnormal parameter extraction unit extracting failure cause index of failure pattern by comparing value of the significance test with test reference value.

Abstract translation: 一种制造装置的控制系统，包括制造信息输入单元，其获取控制制造装置的装置参数的时间序列数据; 故障模式分类模块将每个晶片的故障平面内分布分为故障模式; 索引计算单元，被配置为通过算法对所述时间序列数据进行统计处理，以计算与各个算法对应的索引; 索引分析单元，提供分类有和没有目标故障模式的索引的第一和第二频率分布，以实现第一和第二频率分布之间的显着性测试; 异常参数提取单元通过比较显着性检验值与检测参考值，提取失效原因指标的故障模式。

公开(公告)号：US06916507B2

公开(公告)日：2005-07-12

申请号：US10465680

申请日：2003-06-20

Applicant: Kazuyuki Matsumura ,  Akira Yamamoto ,  Hisayoshi Suda ,  Kenichi Kadota

Inventor： Kazuyuki Matsumura ,  Akira Yamamoto ,  Hisayoshi Suda ,  Kenichi Kadota

IPC: B27K3/15 ,  B27K3/50 ,  C09D183/08 ,  C09K3/18 ,  B05D1/18 ,  B32B21/00 ,  B32B21/14 ,  B32B27/04 ,  C08L83/04

CPC classification number: C08G77/26 ,  B27K3/15 ,  C08L83/08 ,  C09D183/08 ,  C09K3/18 ,  Y10T428/31663 ,  Y10T428/31989 ,  C08L83/00

Abstract: An aqueous water repellent useful in the treatment of substrates of lignocellulose-origin materials or the like is characterized by comprising the product of co-hydrolytic condensation of (A) 100 parts by weight of an organosilicon compound having the formula: (R1)a(OR2)bSiO(4-a-b)/2  (1) wherein R1 is alkyl, R2 is alkyl, 0.75≦a≦1.5, 0.2≦b≦3 and 0.9

Abstract translation: 用于处理木素纤维素原料等的底物的水性防水剂的特征在于包含（A）100重量份具有下式的有机硅化合物的共水解缩合产物： -formulae description =“In-line Formulas”end =“lead”？>（R＆lt; 1＆lt; 1＆gt;）＆lt; （4-ab）/ 2（1）<？in-line-formula description =“In-line formula”end =“tail”？>其中R < 1是烷基，R 2是烷基，0.75 <= a <= 1.5，0.2 <= b <3和0.9 R 3 4 5 （2）<？in-line-formula description =“In-line Formulas”end =“tail”？>其中R 3和R 4均为H 或烷基或氨基烷基，R 5是二价烃基，R“ > 6是烷基，n是0或1，或其部分水解产物在有机酸或无机酸存在下进行。

公开(公告)号：US20050102591A1

公开(公告)日：2005-05-12

申请号：US10784819

申请日：2004-02-24

Applicant: Hiroshi Matsushita ,  Kenichi Kadota ,  Yoshiyuki Shioyama

Inventor： Hiroshi Matsushita ,  Kenichi Kadota ,  Yoshiyuki Shioyama

IPC: G01R31/26 ,  G01R31/01 ,  G11C29/00 ,  G11C29/56 ,  H01L21/66 ,  G01R31/28

CPC classification number: G11C29/006 ,  G01R31/01 ,  G11C29/56 ,  G11C2029/0403 ,  G11C2029/5604

Abstract: A failure detection system includes a wafer test information input unit which acquires pass/fail maps for wafers for a plurality of types of semiconductor devices, displaying failure chip areas based on results of electrical tests performed on chips; an analogous test information input unit which classifies the electrical tests into analogous electrical tests with regard to analogous failures among the semiconductor devices; a subarea setting unit which assigns subareas common to the types of semiconductor devices on a wafer surface; a characteristic quantity calculation unit which statistically calculates characteristic quantities based on a number of the failure chip areas included in the subareas for each analogous electrical test; and a categorization unit which obtains correlation coefficients between the characteristic quantities corresponding to the subareas, and classifies clustering failure patterns of the failure chip areas into categories by comparing the correlation coefficients with a threshold.

Abstract translation: 故障检测系统包括晶片测试信息输入单元，其获取多种类型的半导体器件的晶片的通过/失败映射，基于对芯片执行的电测试的结果显示故障芯片区域; 类似的测试信息输入单元，其将电测试分类为关于半导体器件中的类似故障的类似电测试; 子区域设定单元，其在晶片表面上分配与所述半导体器件的类型相同的子区域; 特征量计算单元，其基于每个类似电测试在所述子区域中包括的故障码片区域的数量来统计计算特征量; 以及分类单元，其获得与所述子区域相对应的特征量之间的相关系数，并且通过将所述相关系数与阈值进行比较来将所述故障码片区域的聚类故障模式分类。

公开(公告)号：US08170707B2

公开(公告)日：2012-05-01

申请号：US12256265

申请日：2008-10-22

Applicant: Hiroshi Matsushita ,  Kenichi Kadota ,  Toshiyuki Aritake

Inventor： Hiroshi Matsushita ,  Kenichi Kadota ,  Toshiyuki Aritake

IPC: G06F19/00

CPC classification number: G05B19/41875 ,  G05B23/0229 ,  G05B2219/1112 ,  G05B2219/32222 ,  G05B2219/45031 ,  G05B2223/02 ,  Y02P90/22

Abstract: A method for inputting a foreign substance inspection map created by foreign substance inspection for a wafer surface after each processing process in a wafer processing process, inputting a die sort map created by a die sort test after the wafer processing process, setting region segments in the wafer, setting a region number for each segment, calculating foreign substance density of the region segments, based on the foreign substance inspection map, and plotting the foreign substance density, using the region numbers, to calculate a foreign substance inspection map waveform characteristic amount, calculating failure density in the region segments, based on the die sort map, and plotting the failure density, using the region numbers, to calculate a die sort map waveform characteristic amount, calculating similarity between the foreign substance inspection map waveform characteristic amount and the die sort map waveform characteristic amount, and identifying a processing process cause of failure occurrence.

Abstract translation: 一种用于在晶片处理过程中的每个处理过程之后输入通过异物检查创建的异物检查图的方法，输入在晶片处理过程之后通过管芯分类测试创建的管芯分类图，在 晶片，根据异物检查图来计算各段的区域编号，计算区域段的异物密度，并使用区域编号绘制异物密度，计算异物检查图波形特征量， 计算区域段中的故障密度，并使用区域编号绘制故障密度，计算模具分类图波形特征量，计算异物检查图波形特征量与模具之间的相似度 排序图波形特征量，并识别处理过程原因 的失败发生。