公开(公告)号：US06218683B1

公开(公告)日：2001-04-17

申请号：US09463407

申请日：2000-02-01

申请人： Shinji Koga ,  Kazuhiro Morishita ,  Katsumi Satoh

发明人： Shinji Koga ,  Kazuhiro Morishita ,  Katsumi Satoh

IPC分类号： H01L2974

CPC分类号： H01L29/32 ,  H01L29/861 ,  H01L29/868

摘要： The present invention relates to a diode, and has an object to simultaneously implement a high di/dt capability, a low reverse recovery loss and a low forward voltage and to suppress generation of voltage oscillation. In order to achieve the above-mentioned object, life time killers are selectively introduced into a semiconductor substrate (20) comprising a P layer (1), an N− layer (21) and an N+ layer (3). A density of the introduced life time killers is the highest in a first region (6) adjacent to the P layer (1), and is the second highest in a second region (7) in the N− layer (21). The life time killers are not introduced into a third region (2). Accordingly, a life time in the N− layer (21) is expressed by the first region (6)

摘要翻译： 本发明涉及一种二极管，其目的在于同时实现高di / dt能力，低反向恢复损耗和低正向电压，并抑制电压振荡的产生。 为了实现上述目的，将寿命杀手选择性地引入到包括P层（1），N层（21）和N +层（3）的半导体衬底（20）中。 引入的寿命杀伤剂的密度在与P层（1）相邻的第一区域（6）中是最高的，并且是N层（21）中的第二区域（7）中的第二高度。 生命时代的杀手并没有被引入第三个地区（2）。 因此，通过第一区域（6）<第二区域（7）<第三区域（2）表示N层（21）中的寿命。 第二区域（7）和第三区域（2）与P层（1）相邻。 此外，第二区域（7）环绕第三区域（2）。

公开(公告)号：US06472692B1

公开(公告)日：2002-10-29

申请号：US09566737

申请日：2000-05-09

申请人： Katsumi Satoh ,  Kazuhiro Morishita ,  Shinji Koga

发明人： Katsumi Satoh ,  Kazuhiro Morishita ,  Shinji Koga

IPC分类号： H01L2974

CPC分类号： H01L29/744 ,  H01L29/1016

摘要： To suppress spike voltage generated at turn-off operation, a semiconductor device according to the invention comprises a first region composed of a first conductor, a second region composed of a second conductor formed on top of the first region, a third region composed of the first conductor formed on top of the second region and a fourth region composed of the second conductor formed on top of the third region. The second region is comprised of a depletion-layer forming auxiliary layer having a short lifetime and formed in the vicinity of the third region, a tail-current suppression layer having a shorter lifetime than that of the depletion-layer forming auxiliary layer and formed in the vicinity of the first region and a depletion-layer forming suppression layer having a longer lifetime than that of the depletion-layer forming auxiliary layer and formed between the depletion-layer forming auxiliary layer and the tail-current suppression layer.

摘要翻译： 为了抑制在关断操作时产生的尖峰电压，根据本发明的半导体器件包括由第一导体构成的第一区域，由形成在第一区域的顶部上的第二导体构成的第二区域，由 第一导体形成在第二区域的顶部上，第四区域由形成在第三区域的顶部上的第二导体构成。 第二区域由具有短寿命且在第三区域附近形成的耗尽层形成辅助层构成，具有比耗尽层形成辅助层的寿命短的尾电流抑制层，并形成在 形成在耗尽层形成辅助层和尾流抑制层之间的第一区域附近和耗尽层形成抑制层的寿命比耗尽层形成辅助层的寿命更长。

公开(公告)号：US06570193B1

公开(公告)日：2003-05-27

申请号：US09612963

申请日：2000-07-10

申请人： Shinji Koga ,  Kazuhiro Morishita ,  Katsumi Satoh

发明人： Shinji Koga ,  Kazuhiro Morishita ,  Katsumi Satoh

IPC分类号： H01L2974

CPC分类号： H01L29/7416 ,  H01L23/051 ,  H01L24/72 ,  H01L2924/1301 ,  H01L2924/00

摘要： The present invention relates to a reverse conducting thyristor device. It aims at preventing heat generated by power loss from filling end field protective rubber and at simplifying a sheath storing a semiconductor substrate. In a reverse conducting thyristor device according to this invention, a self-extinguishing thyristor region is arranged on an inner region of the semiconductor substrate, a reverse conducting diode region whose outer periphery is completely enclosed with an isolation region is arranged on its outer region by at least one, and an external takeout gate electrode region is further arranged on the outermost peripheral region of the semiconductor substrate on the outer part thereof. Thus, a gate electrode provided on a surface of a gate part layer of the self-extinguishing thyristor region is connected with an external takeout gate electrode formed along the outermost periphery of the substrate through a gate wiring pattern formed on a surface of a connecting region.

摘要翻译： 本发明涉及一种反向导通晶闸管器件。 其目的在于防止由于填充末端保护橡胶而导致的功率损失产生的热量，并且简化了存储半导体衬底的护套。 在根据本发明的反向导通晶闸管器件中，在半导体衬底的内部区域上设置自熄晶闸管区域，其外周被隔离区域完全封闭的反向导通二极管区域通过 至少一个，并且外部引出栅电极区域进一步布置在半导体衬底的外部的最外周区域上。 因此，设置在自熄性晶闸管区域的栅极部分层的表面上的栅极电极通过形成在连接区域的表面上的栅极布线图案与沿着基板的最外周形成的外部取出栅电极连接 。

公开(公告)号：US06657239B1

公开(公告)日：2003-12-02

申请号：US09784451

申请日：2001-02-27

申请人： Kazuhiro Morishita ,  Katsumi Satoh

发明人： Kazuhiro Morishita ,  Katsumi Satoh

IPC分类号： H01L2945

CPC分类号： H01L29/41716 ,  H01L29/42308

摘要： In order to reduce a turn-on time of a power switching semiconductor device at a low cost, a first main electrode divided into a plurality of segments forming segment rows of a multi-concentric circle and a control electrode surrounding the segments are formed on a front major surface of a semiconductor substrate, and a second electrode is formed on a rear major surface thereof, and a turn-on operation is performed between the first main electrode and the second main electrode with a control signal inputted from the control electrode, specifying a relationship between a width of a segment and a distance between adjacent segments, and others.

摘要翻译： 为了以低成本降低功率开关半导体器件的导通时间，分割成形成多同心圆的段行的多个段的第一主电极和围绕该段的控制电极形成在 半导体衬底的前主表面和第二电极形成在其后主表面上，并且利用从控制电极输入的控制信号在第一主电极和第二主电极之间进行导通操作，指定 片段的宽度与相邻片段之间的距离之间的关系等。

公开(公告)号：US06521918B2

公开(公告)日：2003-02-18

申请号：US09566738

申请日：2000-05-09

申请人： Kenji Oota ,  Kazuhiro Morishita ,  Katsumi Satoh

发明人： Kenji Oota ,  Kazuhiro Morishita ,  Katsumi Satoh

IPC分类号： H01L31111

CPC分类号： H01L29/0692 ,  H01L29/742 ,  H01L29/744

摘要： To make it possible to control turn-off operation even after switch over to transistor operation after commutation of the main current from cathode electrode to gate electrode in turn-off operation, a semiconductor device according to the invention comprises a first electrode, a first region of first conduction type provided on the first electrode, a second region of second conduction type provided on the first region, a third region and a fourth region of first conduction type respectively provided on the second region with a predetermined distance from each other to allow formation of a channel region on the second region, a fifth region of second conduction type provided on the third region, a second electrode provided on the fifth region, a gate electrode established in contact with the fourth region and a control electrode provided on a separate region between the third and fourth regions on the second region to control the channel region through an insulation layer.

公开(公告)号：US06614087B1

公开(公告)日：2003-09-02

申请号：US09544290

申请日：2000-04-06

申请人： Kazuhiro Morishita ,  Katsumi Satoh ,  Noritoshi Hirano

发明人： Kazuhiro Morishita ,  Katsumi Satoh ,  Noritoshi Hirano

IPC分类号： H01L3106

CPC分类号： H01L29/868 ,  H01L29/36

摘要： An object is to provide a semiconductor device which is free from such voltage oscillation as may cause malfunction of peripheral equipment. In a semiconductor device having a pin structure, the impurity concentration gradient in an n+ layer (103) serving as a buffer layer is set equal to or less than 2×1018cm−4. Then, when a reverse bias voltage is applied and a depletion layer reaches the n+ layer (103), the expansion of the depletion layer is prevented from rapidly stopping and the voltage oscillation can be suppressed.

摘要翻译： 目的是提供一种半导体器件，该半导体器件没有可能导致外围设备故障的电压振荡。 在具有pin结构的半导体器件中，用作缓冲层的n +层（103）中的杂质浓度梯度被设置为等于或小于2×10 18 cm -4。 然后，当施加反向偏置电压并且耗尽层到达n +层（103）时，消除耗尽层的膨胀被快速停止，并且可以抑制电压振荡。

公开(公告)号：US09023343B2

公开(公告)日：2015-05-05

申请号：US13263876

申请日：2010-03-26

申请人： Kazuhiro Morishita ,  Shingo Nakahata ,  Makoto Hamasaki

发明人： Kazuhiro Morishita ,  Shingo Nakahata ,  Makoto Hamasaki

IPC分类号： A61K38/46 ,  C12N15/00 ,  G01N33/53 ,  C12Q1/48 ,  A61K31/223 ,  A61K31/7088 ,  C07K16/40 ,  C07K16/44 ,  C12N9/12 ,  C12N9/18 ,  A61K48/00

CPC分类号： C12Q1/485 ,  A61K31/223 ,  A61K31/7088 ,  A61K48/005 ,  C07K16/40 ,  C07K16/44 ,  C07K2317/34 ,  C12N9/12 ,  C12N9/18 ,  G01N2500/00 ,  A61K2300/00

摘要： Provided is a preventive, progression inhibitor or remedy for a disease one of the causes of which is the activation of the P13K/AKT signaling pathway or vice versa. A phosphorylation-inhibiting and/or dephosphorylating agent, which has an effect of inhibiting the phosphorylation at least at one of the phosphorylation sites of PTEN protein selected from the group consisting of T382, T383 and S380 and/or an effect of dephosphorylating the same, is prepared. Alternatively, a phosphorylation-inhibiting or dephosphorylating agent for PTEN is screened by a method comprising a step for confirming an ability of a test substance to inhibit the phosphorylation at least at one of the phosphorylation sites of PTEN protein selected from the group consisting of T382, T383 and S380 or a dephosphorylation ability thereof. Then, a substance having an effect opposite to the inhibition of PTEN phosphorylation or dephosphorylation thereof, e.g., an antibody against the phosphorylation-inhibiting or dephosphorylating agent for PTEN obtained above, is also obtained.

摘要翻译： 提供预防性，进展抑制剂或疾病的补救方法，其原因之一是激活P13K / AKT信号传导途径，反之亦然。 一种磷酸化抑制剂和/或去磷酸化剂，其至少在选自T382，T383和S380的PTEN蛋白的磷酸化位点之一处抑制磷酸化和/或使其去磷酸化的作用， 准备好了 或者，通过包括以下方法筛选用于PTEN的磷酸化抑制剂或去磷酸化剂，所述方法包括用于确认测试物质至少在PTEN蛋白的一个磷酸化位点抑制磷酸化的能力的步骤，所述磷酸化位点选自T382， T383和S380或其去磷酸化能力。 然后，也可获得具有与抑制PTEN磷酸化或其去磷酸化作用相反的作用的物质，例如针对上述获得的PTEN的磷酸化抑制或去磷酸化剂的抗体。

公开(公告)号：US20120046451A1

公开(公告)日：2012-02-23

申请号：US13238096

申请日：2011-09-21

申请人： Yoshikazu Kurosawa ,  Yasushi Akahori ,  Nobuhiro Takahashi ,  Atsushi Sugioka ,  Nobuhiro Hayashi ,  Akihiko Takasaki ,  Kazuhiro Suzuki ,  Miwa Morita ,  Gene Kurosawa ,  Sari Fujiyama ,  Susumu Tsutsumi ,  Keiko Ogawa ,  Kazuki Matsuda ,  Chiho Muramatsu ,  Yoshitaka Iba ,  Mariko Sumitomo ,  Masachika Azuma ,  Yoshinori Ukai ,  Kazuhiro Morishita

发明人： Yoshikazu Kurosawa ,  Yasushi Akahori ,  Nobuhiro Takahashi ,  Atsushi Sugioka ,  Nobuhiro Hayashi ,  Akihiko Takasaki ,  Kazuhiro Suzuki ,  Miwa Morita ,  Gene Kurosawa ,  Sari Fujiyama ,  Susumu Tsutsumi ,  Keiko Ogawa ,  Kazuki Matsuda ,  Chiho Muramatsu ,  Yoshitaka Iba ,  Mariko Sumitomo ,  Masachika Azuma ,  Yoshinori Ukai ,  Kazuhiro Morishita

IPC分类号： C07K16/42

CPC分类号： C07K16/303 ,  A61K2039/505 ,  C07K16/2803 ,  C07K2317/52 ,  C07K2317/56 ,  C07K2317/565 ,  C07K2317/622 ,  C07K2317/732 ,  C07K2319/00 ,  G01N33/57426 ,  G01N33/57438

摘要： It is intended to clarify a molecule which is available as a target in treating or diagnosing cancer and utilize the molecule in the medical field or the research field. By treating IgSF4, which has been identified as a molecule specifically expressed in lung cancer cells, with an antibody, and ADCC activity is exerted. Based on this finding, an anti-IgSF4 antibody is provided as a means efficacious in treating cancer, etc.

摘要翻译： 旨在澄清可用作治疗或诊断癌症并在医学领域或研究领域中利用分子的靶标的分子。 通过用抗体处理被鉴定为特异性表达于肺癌细胞中的分子的IgSF4，并施加ADCC活性。 基于该发现，提供了抗IgSF4抗体作为治疗癌症等的手段。

公开(公告)号：US06624448B2

公开(公告)日：2003-09-23

申请号：US09822342

申请日：2001-04-02

申请人： Kazunori Taguchi ,  Kazuhiro Morishita ,  Kenji Oota

发明人： Kazunori Taguchi ,  Kazuhiro Morishita ,  Kenji Oota

IPC分类号： H01L2974

CPC分类号： H01L24/72 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/1301 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/00

摘要： A semiconductor device having a supporting member that reduces a resonance phenomenon. A pair of reinforcing members is fixed on a gate drive substrate with spacers interposed there between and upright portions of the pair of reinforcing members are fastened with screws on a side wall of a cathode flange. A spacer is fixed on the gate drive substrate and a projection of the spacer is inserted in an engaging member fixed on the bottom of the cathode fin electrode and thus fixed on the bottom of the cathode fin electrode. The pair of upright portions as the first and second supporting points and the projection of the spacer as the third supporting point stably support the gate drive substrate on the cathode fin electrode without freedom of rotation at the three positions arranged to surround an opening.

摘要翻译： 一种具有减少共振现象​​的支撑构件的半导体器件。 一对加强构件固定在栅极驱动基板上，其间隔着间隔件，一对加强构件的直立部分用螺钉紧固在阴极凸缘的侧壁上。 间隔件固定在栅极驱动基板上，并且间隔件的突起插入固定在阴极鳍电极的底部上的接合构件中，并因此固定在阴极鳍电极的底部。 作为第一支撑点和第二支撑点的一对直立部分和作为第三支撑点的间隔件的突出部在围绕开口的三个位置处稳定地支撑阴极鳍电极上的栅极驱动基板，而不会旋转自如。

公开(公告)号：US06227500B1

公开(公告)日：2001-05-08

申请号：US09281070

申请日：1999-03-09

申请人： Shigemitsu Inaba ,  Kazuhiro Morishita

发明人： Shigemitsu Inaba ,  Kazuhiro Morishita

IPC分类号： G12B900

CPC分类号： B60K37/06 ,  B60K37/02 ,  B60K2350/941 ,  B60K2350/946 ,  G01D11/30

摘要： A meter is mounted to an instrument panel. The meter has an engaging portion in the form of a projection-like rotation shaft and projections located on the side walls of the meter. The instrument panel has a support groove and guide grooves. The meter is inserted into the instrument panel so that the projection-like rotation portion engages with the support groove of the panel. The meter is rotated about the projection-like rotation portion while the projections on the side wall of the meter engage with the guide grooves of the instrument panel.

摘要翻译： 仪表安装在仪表板上。 仪表具有呈突起状旋转轴的形式的接合部分和位于仪表侧壁上的凸起。 仪表板具有支撑槽和引导槽。 仪表被插入到仪表板中，使得突起状旋转部分与面板的支撑槽接合。 仪表在突出状旋转部分周围旋转，同时仪表侧壁上的突起与仪表板的导向槽接合。