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公开(公告)号：US11156651B1
公开(公告)日：2021-10-26
申请号：US16457463
申请日：2019-06-28
Applicant: Juniper Networks, Inc.
Inventor： David P. Chengson , Ranjeeth Doppalapudi
Abstract: Techniques are described for a method for detecting a fault. The method includes receiving, by a receiving electronic device, via a differential pair transmission line, from a transmitting electronic device, an electrical signal. The method further includes converting, by a receiving (Rx) serializer/deserializer (SerDes) operating at the receiving electronic device, the received electrical signal into a received digital electrical signal. The method further includes, determining, by one or more processors, an electrical signature of the received electrical signal from the received digital electrical signal when the received electrical signal is received by the receiving electronic device. The method further includes determining, by the one or more processors, based on the electrical signature, a position of a fault between the receiving electronic device and the transmitting electronic device. The fault causes the received electrical signal to be different than the transmitted electrical signal.
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公开(公告)号：US10069596B1
公开(公告)日：2018-09-04
申请号：US15388901
申请日：2016-12-22
Applicant: Juniper Networks, Inc.
Inventor： David P. Chengson , Granthana Kattehalli Rangaswamy , David James Ofelt , Edward C. Priest , Bhavesh Patel
Abstract: In an example of this disclosure, a method may include receiving, by a bit error location analyzer, a split information signal at a second data rate derived from an information signal at a first data rate. In this example, the second data rate is less than the first data rate, and the bit error location analyzer may be incapable of performing error analysis at the first data rate The method may include performing error analysis, by the bit error location analyzer, on information represented by the split information signal. In some examples, performing error analysis may include comparing the information represented by the split information signal to an information seed to determine a plurality of bit error locations in the information represented by the split information signal relative to the information seed.
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Patent Agency Ranking
公开(公告)号：US10455690B1
公开(公告)日：2019-10-22
申请号：US15934813
申请日：2018-03-23
Applicant: Juniper Networks, Inc.
Inventor： David P. Chengson , Ranjeeth Doppalapudi
Abstract: A printed circuit board (PCB) assembly may include a component capable of sending or receiving high-speed differential signal pairs, a package that is connected to the component, and a PCB connected to the package. The PCB assembly may be used to support a first high-speed differential signal pair that includes a first differential signal and a second differential signal. The first differential signal may be capable of causing crosstalk onto a particular differential signal, of a second high-speed differential signal pair, while propagating through the PCB assembly. A set of interconnects may be used to intelligently route the first differential signal pair within the package and/or within the PCB. The set of interconnects may include a first interconnect to route the first differential signal away from the particular differential signal and a second interconnect to route the second differential signal toward the particular differential signal.
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公开(公告)号：US10455691B1
公开(公告)日：2019-10-22
申请号：US15934826
申请日：2018-03-23
Applicant: Juniper Networks, Inc.
Inventor： David P. Chengson
Abstract: An apparatus may include via pads and grid array pads associated with facilitating a connection through a package and to a component, and vias that are electrically connected to the via pads, wherein the vias are used to support high-speed differential signal pairs that are capable of causing crosstalk onto other high-speed differential signal pairs while propagating through the package. The apparatus may include interconnects that electrically connect the vias to the grid array pads, and that are capable of routing the high-speed differential signal pairs in a way that offsets the crosstalk that the high-speed differential signal pairs are capable of causing while propagating through the package. The apparatus may include additional interconnects that electrically connect the vias to additional vias that are to be used to facilitate routing the high-speed differential signal pairs to the component, without the high-speed differential signal pairs propagating through a printed circuit board.
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公开(公告)号：US10383213B1
公开(公告)日：2019-08-13
申请号：US16283119
申请日：2019-02-22
Applicant: Juniper Networks, Inc.
Inventor： David P. Chengson , Edward C. Chang , Ranjeeth Doppalapudi , Santosh Kumar Pappu
Abstract: In some examples, an electronic device includes a printed circuit board (PCB) device that includes a first trace electrically connected to a first pad of a first trace via on a first layer and a second trace electrically connected to a second pad of a second trace via on a second layer. In some examples, the PCB device also includes four ground pads on the first layer and an antipad surrounding the two trace vias, where a first ground pad is positioned between the first trace and the second trace, where the first ground pad and the second ground pad are approximately symmetrically positioned about a perpendicular bisector of a line from the first pad to the second pad, and wherein the third ground pad and the fourth ground pad are approximately symmetrically positioned about the perpendicular bisector of the line from the first pad to the second pad.
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公开(公告)号：US10365314B1
公开(公告)日：2019-07-30
申请号：US15386711
申请日：2016-12-21
Applicant: Juniper Networks, Inc.
Inventor： David P. Chengson , Ranjeeth Doppalapudi
Abstract: Techniques are described for a method for detecting a fault. The method includes receiving, by a receiving electronic device, via a differential pair transmission line, from a transmitting electronic device, an electrical signal. The method further includes converting, by a receiving (Rx) serializer/deserializer (SerDes) operating at the receiving electronic device, the received electrical signal into a received digital electrical signal. The method further includes, determining, by one or more processors, an electrical signature of the received electrical signal from the received digital electrical signal when the received electrical signal is received by the receiving electronic device. The method further includes determining, by the one or more processors, based on the electrical signature, a position of a fault between the receiving electronic device and the transmitting electronic device. The fault causes the received electrical signal to be different than the transmitted electrical signal.
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公开(公告)号：US10231325B1
公开(公告)日：2019-03-12
申请号：US15385161
申请日：2016-12-20
Applicant: Juniper Networks, Inc.
Inventor： David P. Chengson , Edward C. Chang , Ranjeeth Doppalapudi , Santosh Kumar Pappu
Abstract: In some examples, an electronic device includes a printed circuit board (PCB) device that includes a first trace electrically connected to a first pad of a first trace via on a first layer and a second trace electrically connected to a second pad of a second trace via on a second layer. In some examples, the PCB device also includes four ground pads on the first layer and an antipad surrounding the two trace vias, where a first ground pad is positioned between the first trace and the second trace, where the first ground pad and the second ground pad are approximately symmetrically positioned about a perpendicular bisector of a line from the first pad to the second pad, and wherein the third ground pad and the fourth ground pad are approximately symmetrically positioned about the perpendicular bisector of the line from the first pad to the second pad.
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