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18 条记录 (耗时 0.022 秒)

    Method and apparatus for selecting memory cells within a memory array
    1.
    发明申请
    Method and apparatus for selecting memory cells within a memory array 有权
    用于选择存储器阵列内的存储单元的方法和装置

    公开(公告)号：US20050232023A1

    公开(公告)日：2005-10-20

    申请号：US11129269

    申请日：2005-05-12

    申请人： Joseph Ku ,  James Eaton

    发明人： Joseph Ku ,  James Eaton

    IPC分类号： G11C17/18 ,  G11C5/00 ,  G11C5/06 ,  G11C7/00 ,  G11C7/12 ,  G11C7/22 ,  G11C8/10 ,  G11C17/06

    CPC分类号： G11C8/10 ,  G11C7/12 ,  G11C7/22 ,  G11C17/06

    摘要： The invention includes an apparatus and method of selecting memory cells within a memory array. The method includes receiving a memory cell address. A column address and a row address are generated from the memory cell address. Row select lines or column select lines are pre-charged. A self-timed charging circuit is initiated to provide an adequate amount of time to charge a selected row, and to initiate elimination of static current flowing to unselected rows after a self-timed delay. The other of the row select lines or the column select lines are then pre-charged. Memory cells are selected based upon the column address and the row address. One of two states of the memory cells can be based upon sensing threshold voltages of sense lines that correspond with the selected memory cells.

    摘要翻译： 本发明包括一种选择存储器阵列内的存储单元的装置和方法。 该方法包括接收存储单元地址。 从存储单元地址生成列地址和行地址。 行选择行或列选择行已预充电。 启动自定时充电电路以提供足够的时间来对所选择的行进行充电，并且在自定时延迟之后开始消除流向未选择的行的静态电流。 然后，其他行选择行或列选择行将被预充电。 基于列地址和行地址选择存储单元。 存储器单元的两种状态之一可以基于感测线对应于所选存储单元的阈值电压。

    Power efficient and high performance flip-flop
    4.
    发明授权
    Power efficient and high performance flip-flop 失效
    功率高效和高性能的触发器

    公开(公告)号：US06492854B1

    公开(公告)日：2002-12-10

    申请号：US09941581

    申请日：2001-08-30

    申请人： Joseph Ku ,  Stuart Siu

    发明人： Joseph Ku ,  Stuart Siu

    IPC分类号： H03K3286

    CPC分类号： H03K3/037 ,  H03K3/012

    摘要： A power efficient flip-flop includes a power switch regulating power supplied to a high speed latch in the flip-flop. When the power switch is activated, causing the high speed latch to receive power, the high speed latch captures data received by the flip-flop. The captured data is propagated by the high speed latch to the output of the flip-flop. Simultaneously, the high speed latch transmits the data to a low leakage latch connected to the high speed latch. Then, power is removed from the high speed latch, and the data retained in the low leakage static latch is now released to the output of the flip-flop. The power efficient flip-flop minimizes leakage current generated by the high speed latch by removing a path to ground when power is not provided to the high speed latch. A decoupling device is connected to the power switch to substantially eliminate a coupling effect.

    摘要翻译： 功率高效触发器包括调节提供给触发器中的高速锁存器的功率的电源开关。 当电源开关被激活时，导致高速锁存器接收电力，高速锁存器捕获由触发器接收到的数据。 捕获的数据由高速锁存器传播到触发器的输出。 同时，高速锁存器将数据发送到连接到高速锁存器的低泄漏锁存器。 然后，从高速锁存器中移除电源，并且保留在低泄漏静态锁存器中的数据现在释放到触发器的输出。 功率高效触发器通过在没有向高速锁存器提供电力时去除对地的路径来最小化由高速锁存器产生的漏电流。 解耦装置连接到电源开关以基本上消除耦​​合效应。

    Storing configuration information and a service record for an item in an RFID tag
    5.
    发明授权
    Storing configuration information and a service record for an item in an RFID tag 有权
    将物品的配置信息和服务记录存储在RFID标签中

    公开(公告)号：US07183924B1

    公开(公告)日：2007-02-27

    申请号：US11249544

    申请日：2005-10-13

    申请人： Joseph Ku

    发明人： Joseph Ku

    IPC分类号： G08B13/14

    CPC分类号： G06Q10/087

    摘要： A system includes a reader operable to read information from an RFID tag. The information includes a configuration of an item. A computer system is connected to the reader. The computer system is operable to store the information read from the RFID tag. The computer system is also operable to create a record of service performed on the item, and write the record to the RFID tag using the reader.

    摘要翻译： 一种系统包括读取器，用于从RFID标签读取信息。 该信息包括项目的配置。 计算机系统连接到阅读器。 计算机系统可操作以存储从RFID标签读取的信息。 计算机系统还可操作以创建对该项目执行的服务记录，并且使用读取器将记录写入RFID标签。

    Method for precharging word and bit lines for selecting memory cells within a memory array
    6.
    发明授权
    Method for precharging word and bit lines for selecting memory cells within a memory array 有权
    用于对用于选择存储器阵列内的存储单元的字和位线进行预充电的方法

    公开(公告)号：US06940770B2

    公开(公告)日：2005-09-06

    申请号：US10348645

    申请日：2003-01-21

    申请人： Joseph Ku ,  James Robert Eaton

    发明人： Joseph Ku ,  James Robert Eaton

    IPC分类号： G11C17/18 ,  G11C5/00 ,  G11C5/06 ,  G11C7/00 ,  G11C7/12 ,  G11C7/22 ,  G11C8/10 ,  G11C17/06

    CPC分类号： G11C8/10 ,  G11C7/12 ,  G11C7/22 ,  G11C17/06

    摘要： The invention includes an apparatus and method of selecting memory cells within a memory array. The method includes receiving a memory cell address. A column address and a row address are generated from the memory cell address. Row select lines or column select lines are pre-charged. A self-timed charging circuit is initiated to provide an adequate amount of time to charge a selected row, and to initiate elimination of static current flowing to unselected rows after a self-timed delay. The other of the row select lines or the column select lines are then pre-charged. Memory cells are selected based upon the column address and the row address. One of two states of the memory cells can be based upon sensing threshold voltages of sense lines that correspond with the selected memory cells.

    摘要翻译： 本发明包括一种选择存储器阵列内的存储单元的装置和方法。 该方法包括接收存储单元地址。 从存储单元地址生成列地址和行地址。 行选择行或列选择行已预充电。 启动自定时充电电路以提供足够的时间来对所选择的行进行充电，并且在自定时延迟之后开始消除流向未选择的行的静态电流。 然后，其他行选择行或列选择行将被预充电。 基于列地址和行地址选择存储单元。 存储器单元的两种状态之一可以基于感测线对应于所选存储单元的阈值电压。

    Method and apparatus for thermally assisted testing of integrated circuits
    7.
    发明申请
    Method and apparatus for thermally assisted testing of integrated circuits 失效
    用于集成电路的热辅助测试的方法和装置

    公开(公告)号：US20050054125A1

    公开(公告)日：2005-03-10

    申请号：US10655892

    申请日：2003-09-04

    申请人： Joseph Ku

    发明人： Joseph Ku

    IPC分类号： G01R31/28 ,  H01L23/544 ,  H05B3/00 ,  H01L21/66

    CPC分类号： H01L22/34 ,  G01R31/2856 ,  G01R31/2874 ,  G01R31/2884

    摘要： A system and method for thermally testing integrated circuits, comprising a temperature generation device located within the IC, configured with a primary purpose of affecting a temperature at the IC. A temperature sensor is located within close proximity to the IC, and a temperature controller is coupled to the temperature generation device and to the temperature sensor.

    摘要翻译： 一种用于热测试集成电路的系统和方法，包括位于IC内的温度发生装置，其配置有主要目的以影响IC处的温度。 温度传感器位于IC附近，并且温度控制器耦合到温度发生装置和温度传感器。

    Low power logic gate
    8.
    发明授权
    Low power logic gate 有权

    公开(公告)号：US06826112B2

    公开(公告)日：2004-11-30

    申请号：US10347723

    申请日：2003-01-21

    申请人： Joseph Ku ,  James Robert Eaton

    发明人： Joseph Ku ,  James Robert Eaton

    IPC分类号： G11C800

    CPC分类号： H03K19/096 ,  H03K19/12

    摘要： The invention includes a logic gate. The logic gate includes a charge holding device. A charging circuit selectively provides a predetermined charge for the charge holding device. A logic gate output is a function of charge on the charge holding device. The logic gate further includes a plurality of inputs. The plurality of inputs are electrically connected to the charge holding device so that the charge of the charge holding device is modified if any of the plurality of inputs is a first voltage potential. The invention also includes an address decoder. The address decoder includes a charge holding device. A charging circuit selectively provides a predetermined charge for the charge holding device. An address decoder output is a function of charge on the charge holding device. The address decoder further includes a plurality of address lines. The plurality of address lines are electrically connected to the charge holding device so that the charge of the charge holding device is modified if any of the plurality of address lines is a first voltage potential.

    Traveling wave beamforming network
    9.
    发明授权
    Traveling wave beamforming network 有权
    旅行波束成形网络

    公开(公告)号：US08606206B1

    公开(公告)日：2013-12-10

    申请号：US12722680

    申请日：2010-03-12

    申请人： Lawrence K. Lam ,  Joseph Ku

    发明人： Lawrence K. Lam ,  Joseph Ku

    IPC分类号： H04B1/06

    CPC分类号： H01P1/184 ,  H01Q3/26 ,  H01Q3/2694

    摘要： A beamforming network includes a plurality of signal conditioning devices in signal communication with each other, wherein each of the signal conditioning devices receives an input signal, conditions the input signal by independently and selectively adjusting at least one of a time delay, a phase, and an amplitude of the input signal, and transmits an output signal to at least one of another of the signal conditioning devices, an antenna, and a load.

    摘要翻译： 波束成形网络包括彼此信号通信的多个信号调理装置，其中每个信号调节装置接收输入信号，通过独立地选择性地调节输入信号，并选择性地调整时延，相位和 输入信号的幅度，并且将输出信号发送到信号调节装置，天线和负载中的至少一个。