公开(公告)号：US08468118B2

公开(公告)日：2013-06-18

申请号：US09912522

申请日：2001-07-26

Applicant: Jin-Kwan Kim ,  Jong-Soo Yoon ,  Yea-Sun Yoon

Inventor： Jin-Kwan Kim ,  Jong-Soo Yoon ,  Yea-Sun Yoon

IPC: G06F7/00

CPC classification number: G06F17/3089 ,  G06F2216/11

Abstract: Disclosed are a system and a method for analyzing and utilizing intellectual property information. The method comprises the steps of registering search strategy formulas for extracting intellectual property (IP) information; accessing and searching Internet websites that provide IP information based on the registered search strategy formulas, and extracting first IP information according to the search; placing the first IP information in a standard form and performing a first storage operation of the first IP information, and transmitting the converted IP information to research center PCs; determining whether a request for detailed information has been made from the research center PCs, and if it has, accessing the Internet websites and extracting second IP information corresponding to the first IP information; and placing the second IP information in a standard form and performing a second storage operation of the converted IP information, and transmitting the converted IP information to the research center PCs. The system comprises an IP information extraction unit for extracting IP information according to the operation of software from at least one on-line IP information DB; an IP information analyzing unit for controlling the operation of the software, receiving the extracted IP information and storing the same together with data containing predetermined opinion contents, and outputting the IP information; and an E-mail receiving/transmitting unit for transmitting the IP information received from the IP information analyzing unit to research center PCs, and receiving feedback of data containing opinion contents from the research center PCs.

公开(公告)号：US07642757B2

公开(公告)日：2010-01-05

申请号：US11538572

申请日：2006-10-04

Applicant: Jong-Soo Yoon ,  Seung-Pil Moon ,  Won-Kyo Lee ,  Chang-Gon Kim ,  Jin-Boo Choo ,  Young-Cheul Choi ,  Young-Soo Jeon ,  Byung-Hoon Chang ,  Soo-Yeol Kim

Inventor： Jong-Soo Yoon ,  Seung-Pil Moon ,  Won-Kyo Lee ,  Chang-Gon Kim ,  Jin-Boo Choo ,  Young-Cheul Choi ,  Young-Soo Jeon ,  Byung-Hoon Chang ,  Soo-Yeol Kim

IPC: G05F1/70 ,  G05F3/00 ,  G05F5/00

CPC classification number: H02J13/0079 ,  H02J3/1814 ,  Y02E40/18 ,  Y02E40/74 ,  Y02E40/76 ,  Y02E60/74 ,  Y04S10/22 ,  Y04S10/30 ,  Y04S10/545

Abstract: A system and method for operating a Unified Power Flow Controller (UPFC) connected to a SCADA (Supervisory Control and Data Acquisition) are disclosed. The UPFC automatic operation system receives power system data from the SCADA system, automatically determines UPFC's optimum operation conditions according to power system states. The system includes: a UPFC acting as a serial/parallel FACTS to control variables of a power system; a SCADA for periodically acquiring line data of the power system and state data of the UPFC; and an upper controller for analyzing data received from the SCADA, and determining an UPFC's optimum operation mode for each power system condition and UPFC's optimum set-point control commands.

Abstract translation: 公开了一种用于操作连接到SCADA（监控和数据采集）的统一功率流量控制器（UPFC）的系统和方法。 UPFC自动操作系统从SCADA系统接收电力系统数据，根据电力系统状态自动确定UPFC的最佳运行状况。 该系统包括：作为串行/并行FACTS的UPFC，用于控制电力系统的变量; 用于周期性地获取电力系统的线路数据和UPFC的状态数据的SCADA; 以及用于分析从SCADA接收到的数据的上位控制器，以及为每个电力系统条件和UPFC的最佳设定点控制命令确定UPFC的最佳操作模式。

公开(公告)号：US07507994B2

公开(公告)日：2009-03-24

申请号：US11625694

申请日：2007-01-22

Applicant: Bum-Ki Baek ,  Mun-Pyo Hong ,  Jang-Soo Kim ,  Sung-Wook Hao ,  Jong-Soo Yoon ,  Doug-Gyu Kim

Inventor： Bum-Ki Baek ,  Mun-Pyo Hong ,  Jang-Soo Kim ,  Sung-Wook Hao ,  Jong-Soo Yoon ,  Doug-Gyu Kim

IPC: H01L29/04

CPC classification number: G02F1/13458 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2001/136236 ,  G02F2001/136272 ,  G02F2001/13629 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66765 ,  Y10S438/949

Abstract: A conductive layer, including a lower layer made of refractory metal such as chromium, molybdenum, and molybdenum alloy and an upper layer made of aluminum or aluminum alloy, is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode on a substrate. At this time, the upper layer of the gate pad is removed using a photoresist pattern having different thicknesses depending on position as etch mask. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially formed. A conductive material is deposited and patterned to form a data wire including a data line, a source electrode, a drain electrode, and a data pad.

Abstract translation: 包括由诸如铬，钼和钼合金的难熔金属制成的下层和由铝或铝合金制成的上层的导电层被沉积和图案化以形成包括栅极线，栅极焊盘， 以及在基板上的栅电极。 此时，根据作为蚀刻掩模的位置，使用具有不同厚度的光致抗蚀剂图案去除栅极焊盘的上层。 依次形成栅极绝缘层，半导体层和欧姆接触层。 导电材料被沉积并图案化以形成包括数据线，源电极，漏电极和数据焊盘的数据线。

公开(公告)号：US07098480B2

公开(公告)日：2006-08-29

申请号：US10273298

申请日：2002-10-18

Applicant: Dong-Gyu Kim ,  Jong-Soo Yoon

Inventor： Dong-Gyu Kim ,  Jong-Soo Yoon

IPC: H01L29/00

CPC classification number: G02F1/13458 ,  G02F1/136227 ,  G02F2001/136222 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1285 ,  H01L27/1288 ,  H01L27/1292 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78633

Abstract: Disclosed is a simplified method for manufacturing a liquid crystal display. A gate wire including a gate line, a gate pad, and a gate electrode are formed on a substrate. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially deposited, and a photoresist layer is coated thereon. The photoresist layer is exposed to light through a mask and developed to form a photoresist pattern. At this time, a first portion of the photoresist pattern which is located between the source electrode and the drain electrode is thinner than a second portion which is located on the data wire, and the photoresist layer is totally removed on other parts. The thin portion is made by controlling the amount of irradiating light or by a reflow process to form a thin portion, and the amount of light is controlled by using a mask that has a slit, a small pattern smaller than the resolution of the exposure device, or a partially transparent layer. Next, the exposed portions of conductor layer are removed by wet etch or dry etch, and thereby the underlying ohmic contact layer is exposed. Then the exposed ohmic contact layer and the underlying semiconductor layer are removed by dry etching along with the first portion of the photoresist layer. The residue of the photoresist layer is removed by ashing. Source/drain electrodes are separated by removing the portion of the conductor layer at the channel and the underlying ohmic contact layer pattern. Then, the second portion of the photoresist layer is removed, and red, green, and blue color filters, a pixel electrode, a redundant gate pad, and a redundant data pad are formed.

公开(公告)号：US07078255B2

公开(公告)日：2006-07-18

申请号：US10933545

申请日：2004-09-03

Applicant: Mun-Pyo Hong ,  Woon-Yong Park ,  Jong-Soo Yoon

Inventor： Mun-Pyo Hong ,  Woon-Yong Park ,  Jong-Soo Yoon

IPC: H01L21/00 ,  H01L21/84

CPC classification number: G02F1/13458 ,  G02F1/1362 ,  G02F1/136227 ,  G02F2001/136236 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/458 ,  Y10S438/942 ,  Y10S438/947 ,  Y10S438/949

Abstract: Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched. After depositing a passivation layer, a opening is formed by using the fourth mask and the exposed semiconductor layer through the opening is etched to separate the semiconductor layer under the adjacent data line.

公开(公告)号：US06937303B2

公开(公告)日：2005-08-30

申请号：US10322812

申请日：2002-12-18

Applicant: Yong-Kyu Jang ,  Hyung-Guel Kim ,  Jong-Soo Yoon ,  Dong-Ho Lee

Inventor： Yong-Kyu Jang ,  Hyung-Guel Kim ,  Jong-Soo Yoon ,  Dong-Ho Lee

IPC: G02F1/1335 ,  G02F1/13357

CPC classification number: G02F1/133555 ,  G02F1/133615 ,  G02F2001/133567

Abstract: Disclosed is a transmissive and reflective type LCD. In the LCD, a second substrate faces a first substrate. Liquid crystal layer is formed between the first and second substrate. A first polarizing plate is formed on outer surface of the first substrate. A second polarizing plate is formed on outer surface of the second substrate. A backlight is arranged at a rear side of the first polarizing plate. A transparent transflective film is arranged between the first polarizing plate and the backlight and has a plurality of layers where a first and a second layer each having different refractivity indexes are alternatively stacked. The transparent transflective film partially reflects and transmits incident light. By a restoring process occurring between the transflective film and the backlight, a predetermined amount of the incident light is transmitted through the transflective film repeatedly, so that transmissivity and light efficiency are enhanced.

Abstract translation: 公开了透射和反射型LCD。 在LCD中，第二基板面向第一基板。 在第一和第二基板之间形成液晶层。 第一偏振板形成在第一基板的外表面上。 第二偏振板形成在第二基板的外表面上。 背光源配置在第一偏振板的后侧。 透明半透反射膜布置在第一偏振板和背光源之间，并且具有多个层，其中各层具有不同折射率的第一层和第二层交替堆叠。 透明透反射膜部分地反射和透射入射光。 通过在半透反射膜和背光源之间发生的恢复处理，预定量的入射光重复地透过透反射膜，从而提高了透射率和光效率。

公开(公告)号：US06451635B2

公开(公告)日：2002-09-17

申请号：US09804056

申请日：2001-03-13

Applicant: Woon-Yong Park ,  Jong-Soo Yoon

Inventor： Woon-Yong Park ,  Jong-Soo Yoon

IPC: H01L2904

CPC classification number: G03F7/70458 ,  G02F1/1362 ,  G02F2001/136236 ,  H01L27/12

Abstract: A method of fabricating a thin film transistor array substrate for a liquid crystal display includes the step of forming a gate line assembly with gate lines, gate electrodes and gate pads. After laying a plurality of layers on the substrate, a photoresist film is deposited onto the layers. The photoresist film is first exposed to light at a first light exposing unit, and secondly exposed to light at a second light exposing unit such that the photoresist film has three portions of different thickness. The photoresist pattern, and some of the underlying layers are etched to form a data line assembly, a semiconductor pattern, and an ohmic contact pattern. The data line assembly includes data lines, source and drain electrodes, and data pads. The remaining photoresist film is removed, and a protective layer is formed on the substrate. The protective layer is etched together with the gate insulating layer to form first to third contact holes exposing the drain electrode, the gate pad and the data pad, respectively. Pixel electrodes, subsidiary gate and data pads are then formed.

Abstract translation: 制造用于液晶显示器的薄膜晶体管阵列基板的方法包括用栅极线，栅极电极和栅极焊盘形成栅极线组件的步骤。 在衬底上铺设多层之后，在层上沉积光致抗蚀剂膜。 光致抗蚀剂膜首先在第一曝光单元处曝光，其次在第二光曝光单元处曝光，使得光致抗蚀剂膜具有不同厚度的三个部分。 蚀刻图案和一些下面的层被蚀刻以形成数据线组件，半导体图案和欧姆接触图案。 数据线组件包括数据线，源极和漏极以及数据焊盘。 除去剩余的光致抗蚀剂膜，并在基板上形成保护层。 保护层与栅极绝缘层一起被蚀刻，以形成分别暴露漏电极，栅极焊盘和数据焊盘的第一至第三接触孔。 然后形成像素电极，辅助栅极和数据焊盘。

公开(公告)号：US06380559B1

公开(公告)日：2002-04-30

申请号：US09585427

申请日：2000-06-02

Applicant: Woon-Yong Park ,  Jong-Soo Yoon ,  Chang-Oh Jeong

Inventor： Woon-Yong Park ,  Jong-Soo Yoon ,  Chang-Oh Jeong

IPC: H01L2904

CPC classification number: G02F1/13458 ,  G02F1/136286 ,  G02F2001/136222 ,  G02F2001/136231 ,  G02F2001/13629 ,  G02F2201/40 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/458 ,  H01L29/4908

Abstract: A thin film transistor substrate for a liquid crystal display includes an insulating substrate, and a gate line assembly formed on the substrate. The gate line assembly has a double-layered structure with a lower layer exhibiting good contact characteristics with respect to indium tin oxide, and an upper layer exhibiting low resistance characteristics. A gate insulating layer, a semiconductor layer, a contact layer, and first and second data line layers are sequentially deposited onto the substrate with the gate line assembly. The first and second data line layers are patterned to form a data line assembly, and the contact layer is etched through the pattern of the data line assembly such that the contact layer has the same pattern as the data line assembly. A passivation layer is deposited onto the data line assembly, and a photoresist pattern is formed on the passivation layer by using a mask of different light transmissties mainly at a display area and a peripheral area. The passivation layer and the underlying layers are etched through the photoresist pattern to form a semiconductor pattern and contact windows. A pixel electrode, a supplemental gate pad and a supplemental data pad are then formed of indium tin oxide or indium zinc oxide. The gate and data line assemblies may be formed with a single layered structure. A black matrix and a color filter may be formed at the structured substrate before forming the pixel electrode, and an opening portion may be formed between the pixel electrode and the data line to prevent possible short circuits.

Abstract translation: 用于液晶显示器的薄膜晶体管衬底包括绝缘衬底和形成在衬底上的栅极线组件。 栅极线组件具有双层结构，其具有相对于氧化铟锡具有良好接触特性的较低层，以及表现出低电阻特性的上层。 栅极绝缘层，半导体层，接触层以及第一和第二数据线层被栅极线组件依次沉积到衬底上。 图案化第一和第二数据线层以形成数据线组件，并且通过数据线组件的图案蚀刻接触层，使得接触层具有与数据线组件相同的图案。 钝化层沉积到数据线组件上，并且主要在显示区域和周边区域上通过使用不同光透射掩模在钝化层上形成光致抗蚀剂图案。 通过光致抗蚀剂图案蚀刻钝化层和下面的层以形成半导体图案和接触窗口。 然后由氧化铟锡或氧化铟锌形成像素电极，辅助栅极焊盘和补充数据焊盘。 栅极和数据线组件可以形成为单层结构。 在形成像素电极之前，可以在结构化衬底上形成黑色矩阵和滤色器，并且可以在像素电极和数据线之间形成开口部分，以防止可能的短路。

公开(公告)号：US20100295050A1

公开(公告)日：2010-11-25

申请号：US12834798

申请日：2010-07-12

Applicant: Dong-Gyu Kim ,  Jong-Soo Yoon

Inventor： Dong-Gyu Kim ,  Jong-Soo Yoon

IPC: H01L33/08

CPC classification number: G02F1/13458 ,  G02F1/136227 ,  G02F2001/136222 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1285 ,  H01L27/1288 ,  H01L27/1292 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78633

Abstract: Disclosed is a simplified method for manufacturing a liquid crystal display. A gate wire including a gate line, a gate pad, and a gate electrode are formed on a substrate. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially deposited, and a photoresist layer is coated thereon. The photoresist layer is exposed to light through a mask and developed to form a photoresist pattern. At this time, a first portion of the photoresist pattern which is located between the source electrode and the drain electrode is thinner than a second portion which is located on the data wire, and the photoresist layer is totally removed on other parts. The thin portion is made by controlling the amount of irradiating light or by a reflow process to form a thin portion, and the amount of light is controlled by using a mask that has a slit, a small pattern smaller than the resolution of the exposure device, or a partially transparent layer. Next, the exposed portions of conductor layer are removed by wet etch or dry etch, and thereby the underlying ohmic contact layer is exposed. Then the exposed ohmic contact layer and the underlying semiconductor layer are removed by dry etching along with the first portion of the photoresist layer. The residue of the photoresist layer is removed by ashing. Source/drain electrodes are separated by removing the portion of the conductor layer at the channel and the underlying ohmic contact layer pattern. Then, the second portion of the photoresist layer is removed, and red, green, and blue color filters, a pixel electrode, a redundant gate pad, and a redundant data pad are formed.

Abstract translation: 公开了一种用于制造液晶显示器的简化方法。 在基板上形成包括栅极线，栅极焊盘和栅电极的栅极线。 依次沉积栅极绝缘层，半导体层和欧姆接触层，并在其上涂覆光致抗蚀剂层。 光致抗蚀剂层通过掩模曝光并显影以形成光致抗蚀剂图案。 此时，位于源电极和漏电极之间的光致抗蚀剂图案的第一部分比位于数据线上的第二部分薄，并且光致抗蚀剂层在其它部分被完全去除。 通过控制照射光的量或通过回流工艺形成薄的部分来制造薄部分，并且通过使用具有狭缝的掩模来控制光量，小的图案小于曝光装置的分辨率 ，或部分透明的层。 接下来，通过湿蚀刻或干蚀刻去除导体层的暴露部分，从而暴露下面的欧姆接触层。 然后通过干蚀刻与光致抗蚀剂层的第一部分一起去除暴露的欧姆接触层和下面的半导体层。 通过灰化除去光致抗蚀剂层的残留物。 通过去除沟道处的导体层的部分和下面的欧姆接触层图案来分离源极/漏极。 然后，除去光致抗蚀剂层的第二部分，并形成红色，绿色和蓝色滤色器，像素电极，冗余栅极焊盘和冗余数据焊盘。

公开(公告)号：US07759176B2

公开(公告)日：2010-07-20

申请号：US12143685

申请日：2008-06-20

Applicant: Dong-Gyu Kim ,  Jong-Soo Yoon

Inventor： Dong-Gyu Kim ,  Jong-Soo Yoon

IPC: H01L21/00 ,  H01L29/04

CPC classification number: G02F1/13458 ,  G02F1/136227 ,  G02F2001/136222 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1285 ,  H01L27/1288 ,  H01L27/1292 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78633

Abstract: Disclosed is a simplified method for manufacturing a liquid crystal display. A gate wire including a gate line, a gate pad, and a gate electrode are formed on a substrate. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially deposited, and a photoresist layer is coated thereon. The photoresist layer is exposed to light through a mask and developed to form a photoresist pattern. At this time, a first portion of the photoresist pattern which is located between the source electrode and the drain electrode is thinner than a second portion which is located on the data wire, and the photoresist layer is totally removed on other parts. The thin portion is made by controlling the amount of irradiating light or by a reflow process to form a thin portion, and the amount of light is controlled by using a mask that has a slit, a small pattern smaller than the resolution of the exposure device, or a partially transparent layer. Next, the exposed portions of conductor layer are removed by wet etch or dry etch, and thereby the underlying ohmic contact layer is exposed. Then the exposed ohmic contact layer and the underlying semiconductor layer are removed by dry etching along with the first portion of the photoresist layer. The residue of the photoresist layer is removed by ashing. Source/drain electrodes are separated by removing the portion of the conductor layer at the channel and the underlying ohmic contact layer pattern. Then, the second portion of the photoresist layer is removed, and red, green, and blue color filters, a pixel electrode, a redundant gate pad, and a redundant data pad are formed.

Abstract translation: 公开了一种用于制造液晶显示器的简化方法。 在基板上形成包括栅极线，栅极焊盘和栅电极的栅极线。 依次沉积栅极绝缘层，半导体层和欧姆接触层，并在其上涂覆光致抗蚀剂层。 光致抗蚀剂层通过掩模曝光并显影以形成光致抗蚀剂图案。 此时，位于源电极和漏电极之间的光致抗蚀剂图案的第一部分比位于数据线上的第二部分薄，并且光致抗蚀剂层在其它部分被完全去除。 通过控制照射光的量或通过回流工艺形成薄的部分来制造薄部分，并且通过使用具有狭缝的掩模来控制光量，小的图案小于曝光装置的分辨率 ，或部分透明的层。 接下来，通过湿蚀刻或干蚀刻去除导体层的暴露部分，从而暴露下面的欧姆接触层。 然后通过干蚀刻与光致抗蚀剂层的第一部分一起去除暴露的欧姆接触层和下面的半导体层。 通过灰化除去光致抗蚀剂层的残留物。 通过去除沟道处的导体层的部分和下面的欧姆接触层图案来分离源极/漏极。 然后，除去光致抗蚀剂层的第二部分，并形成红色，绿色和蓝色滤色器，像素电极，冗余栅极焊盘和冗余数据焊盘。