公开(公告)号：US20090256251A1

公开(公告)日：2009-10-15

申请号：US12072157

申请日：2008-02-25

Applicant: James W. Getz ,  David W. Sherrer ,  John J. Fisher

Inventor： James W. Getz ,  David W. Sherrer ,  John J. Fisher

IPC: H01L23/10 ,  H01L21/50

CPC classification number: B81B7/007 ,  B81C2203/0109 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided are electronic device packages and their methods of formation. The electronic device packages include an electronic device mounted on a substrate, a conductive via and a locally thinned region in the substrate. The invention finds application, for example, in the electronics industry for hermetic packages containing an electronic device such as an IC, optoelectronic or MEMS device.

Abstract translation: 提供电子器件封装及其形成方法。 电子器件封装包括安装在衬底上的电子器件，衬底中的导电通孔和局部变薄的区域。 本发明可应用于电子工业中用于包含诸如IC，光电子或MEMS器件的电子器件的气密封装。

公开(公告)号：US08203207B2

公开(公告)日：2012-06-19

申请号：US12072157

申请日：2008-02-25

Applicant: James W. Getz ,  David W. Sherrer ,  John J. Fisher

Inventor： James W. Getz ,  David W. Sherrer ,  John J. Fisher

IPC: H01L23/04 ,  H01L29/06 ,  H01L29/40 ,  H01L21/4763 ,  H01L21/44 ,  H01L21/302

CPC classification number: B81B7/007 ,  B81C2203/0109 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided are electronic device packages and their methods of formation. The electronic device packages include an electronic device mounted on a substrate, a conductive via and a locally thinned region in the substrate. The invention finds application, for example, in the electronics industry for hermetic packages containing an electronic device such as an IC, optoelectronic or MEMS device.

Abstract translation: 提供电子器件封装及其形成方法。 电子器件封装包括安装在衬底上的电子器件，衬底中的导电通孔和局部变薄的区域。 本发明可应用于电子工业中用于包含诸如IC，光电子或MEMS器件的电子器件的气密封装。

公开(公告)号：US20080247712A1

公开(公告)日：2008-10-09

申请号：US12079513

申请日：2008-03-27

Applicant: William K. Hogen ,  Carl E. Gaebe ,  James W. Getz ,  David W. Sherrer

Inventor： William K. Hogen ,  Carl E. Gaebe ,  James W. Getz ,  David W. Sherrer

IPC: G02B6/36

CPC classification number: G02B6/4292 ,  G02B6/4201 ,  G02B6/4208 ,  G02B6/422 ,  G02B6/4237

Abstract: Provided are electronic device packages and their methods of formation. The electronic device packages include an electronic device mounted on a substrate, a conductive via and a locally thinned region in the substrate. The invention finds application, for example, in the electronics industry for hermetic packages containing an electronic device such as an IC, optoelectronic or MEMS device.

Abstract translation: 提供电子器件封装及其形成方法。 电子器件封装包括安装在衬底上的电子器件，衬底中的导电通孔和局部变薄的区域。 本发明可应用于电子工业中用于包含诸如IC，光电子或MEMS器件的电子器件的气密封装。

公开(公告)号：US07508065B2

公开(公告)日：2009-03-24

申请号：US11590629

申请日：2006-10-31

Applicant: David W. Sherrer ,  Larry J. Rasnake ,  John J. Fisher

Inventor： David W. Sherrer ,  Larry J. Rasnake ,  John J. Fisher

IPC: H01L23/12

CPC classification number: G02B6/4248 ,  G01B11/16 ,  G01B11/26 ,  G02B6/3692 ,  G02B6/4201 ,  G02B6/4204 ,  G02B6/4206 ,  G02B6/421 ,  G02B6/4214 ,  G02B6/423 ,  G02B6/4239 ,  G02B6/4243 ,  G02B6/4244 ,  G02B6/4257 ,  G02B6/4271 ,  G02B6/4292 ,  H01L23/481 ,  H01L2924/0002 ,  H01S5/0014 ,  H01S5/022 ,  H01S5/02208 ,  H01S5/02216 ,  H01S5/0222 ,  H01S5/02252 ,  H01S5/02272 ,  H01S5/02284 ,  H01S5/02288 ,  H01S5/02415 ,  H01S5/02469 ,  H01S5/0683 ,  H01L2924/00012 ,  H01L2924/00

Abstract: Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.

Abstract translation: 提供形成密封通孔结构的方法。 一种方法包括：（a）提供具有第一表面和与第一表面相对的第二表面的半导体衬底; （b）在所述基板的第一表面上形成层; （c）从所述第二表面到所述层蚀刻穿过所述基板的通孔，所述通孔在所述第一表面具有第一周边; （d）在所述层中形成孔，其中所述孔在所述第一周边内具有第二周边; 和（e）提供用于密封通孔结构的导电结构。 还提供了密封通孔结构，检测密封器件封装中的泄漏的方法，密封器件封装，具有冷却结构的器件封装以及将第一元件接合到第二元件的方法。

公开(公告)号：US07888793B2

公开(公告)日：2011-02-15

申请号：US11590099

申请日：2006-10-31

Applicant: David W. Sherrer ,  Larry J. Rasnake ,  John J. Fisher

Inventor： David W. Sherrer ,  Larry J. Rasnake ,  John J. Fisher

IPC: H01L23/34

CPC classification number: G02B6/4248 ,  G01B11/16 ,  G01B11/26 ,  G02B6/3692 ,  G02B6/4201 ,  G02B6/4204 ,  G02B6/4206 ,  G02B6/421 ,  G02B6/4214 ,  G02B6/423 ,  G02B6/4239 ,  G02B6/4243 ,  G02B6/4244 ,  G02B6/4257 ,  G02B6/4271 ,  G02B6/4292 ,  H01L23/481 ,  H01L2924/0002 ,  H01S5/0014 ,  H01S5/022 ,  H01S5/02208 ,  H01S5/02216 ,  H01S5/0222 ,  H01S5/02252 ,  H01S5/02272 ,  H01S5/02284 ,  H01S5/02288 ,  H01S5/02415 ,  H01S5/02469 ,  H01S5/0683 ,  H01L2924/00012 ,  H01L2924/00

Abstract: Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.

Abstract translation: 提供形成密封通孔结构的方法。 一种方法包括：（a）提供具有第一表面和与第一表面相对的第二表面的半导体衬底; （b）在所述基板的第一表面上形成层; （c）从所述第二表面到所述层蚀刻穿过所述基板的通孔，所述通孔在所述第一表面具有第一周边; （d）在所述层中形成孔，其中所述孔在所述第一周边内具有第二周边; 和（e）提供用于密封通孔结构的导电结构。 还提供了密封通孔结构，检测密封器件封装中的泄漏的方法，密封器件封装，具有冷却结构的器件封装以及将第一元件接合到第二元件的方法。

公开(公告)号：US07449784B2

公开(公告)日：2008-11-11

申请号：US11590592

申请日：2006-10-31

Applicant: David W. Sherrer ,  Larry J. Rasnake ,  John J. Fisher

Inventor： David W. Sherrer ,  Larry J. Rasnake ,  John J. Fisher

IPC: H01L29/40

CPC classification number: G02B6/4248 ,  G01B11/16 ,  G01B11/26 ,  G02B6/3692 ,  G02B6/4201 ,  G02B6/4204 ,  G02B6/4206 ,  G02B6/421 ,  G02B6/4214 ,  G02B6/423 ,  G02B6/4239 ,  G02B6/4243 ,  G02B6/4244 ,  G02B6/4257 ,  G02B6/4271 ,  G02B6/4292 ,  H01L23/481 ,  H01L2924/0002 ,  H01S5/0014 ,  H01S5/022 ,  H01S5/02208 ,  H01S5/02216 ,  H01S5/0222 ,  H01S5/02252 ,  H01S5/02272 ,  H01S5/02284 ,  H01S5/02288 ,  H01S5/02415 ,  H01S5/02469 ,  H01S5/0683 ,  H01L2924/00012 ,  H01L2924/00

Abstract: Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.

Abstract translation: 提供形成密封通孔结构的方法。 一种方法包括：（a）提供具有第一表面和与第一表面相对的第二表面的半导体衬底; （b）在所述基板的第一表面上形成层; （c）从所述第二表面到所述层蚀刻穿过所述基板的通孔，所述通孔在所述第一表面具有第一周边; （d）在所述层中形成孔，其中所述孔在所述第一周边内具有第二周边; 和（e）提供用于密封通孔结构的导电结构。 还提供了密封通孔结构，检测密封器件封装中的泄漏的方法，密封器件封装，具有冷却结构的器件封装以及将第一元件接合到第二元件的方法。

公开(公告)号：US07329056B2

公开(公告)日：2008-02-12

申请号：US10941668

申请日：2004-09-15

Applicant: David W. Sherrer ,  Larry J. Rasnake ,  John J. Fisher

Inventor： David W. Sherrer ,  Larry J. Rasnake ,  John J. Fisher

IPC: G02B6/42 ,  G02B6/43

CPC classification number: G02B6/4248 ,  G01B11/16 ,  G01B11/26 ,  G02B6/3692 ,  G02B6/4201 ,  G02B6/4204 ,  G02B6/4206 ,  G02B6/421 ,  G02B6/4214 ,  G02B6/423 ,  G02B6/4239 ,  G02B6/4243 ,  G02B6/4244 ,  G02B6/4257 ,  G02B6/4271 ,  G02B6/4292 ,  H01L23/481 ,  H01L2924/0002 ,  H01S5/0014 ,  H01S5/022 ,  H01S5/02208 ,  H01S5/02216 ,  H01S5/0222 ,  H01S5/02252 ,  H01S5/02272 ,  H01S5/02284 ,  H01S5/02288 ,  H01S5/02415 ,  H01S5/02469 ,  H01S5/0683 ,  H01L2924/00012 ,  H01L2924/00

Abstract: Provided are optoelectronic device packages. The packages include a base substrate having an optoelectronic device mounting region on a surface of the base substrate and a lid mounting region. An optoelectronic device is mounted on the optoelectronic device mounting region. A lid is mounted on the lid mounting region to form an enclosed volume between the base substrate and the lid. The optoelectronic device is in the enclosed volume. The lid has an optically transmissive region suitable for transmitting light of a given wavelength along an optical path to or from the optoelectronic device, wherein at least a portion of the lid mounting region is disposed along the optical path below the surface of the base substrate to a depth below the optical path. Also provided are wafer or grid level optoelectronic device packages, wafer- or grid-level optoelectronic device package lid and their methods of formation, and connectorized optoelectronic devices.

Abstract translation: 提供的是光电器件封装。 封装包括在基底基板的表面上具有光电子器件安装区域的基底基板和盖安装区域。 光电子器件安装在光电器件安装区域上。 盖安装在盖安装区域上以在基底基板和盖之间形成封闭的容积。 光电子器件处于封闭容积。 盖具有适于将光给定波长的光沿着光路传送到光电子器件或从光电子器件传输的光学透射区域，其中盖安装区域的至少一部分沿着基底衬底表面下方的光路设置， 光路下方的深度。 还提供了晶片或栅格级光电子器件封装，晶片或栅格级光电子器件封装盖及其形成方法和连接的光电子器件。

公开(公告)号：US07148772B2

公开(公告)日：2006-12-12

申请号：US11316417

申请日：2005-12-22

Applicant: David W. Sherrer ,  John J. Fisher

Inventor： David W. Sherrer ,  John J. Fisher

IPC: H01P3/06

CPC classification number: H01P3/06 ,  H01P1/08 ,  H01P3/00 ,  H01P5/103 ,  H01P5/183 ,  H01P11/002 ,  H01P11/003 ,  H01P11/005 ,  H05K1/0221 ,  H05K1/0272 ,  H05K3/4644 ,  H05K3/4685 ,  H05K2201/09809 ,  Y10T29/49117 ,  Y10T29/49123

Abstract: Provided are coaxial waveguide microstructures. The microstructures include a substrate and a coaxial waveguide disposed above the substrate. The coaxial waveguide includes: a center conductor; an outer conductor including one or more walls, spaced apart from and disposed around the center conductor; one or more dielectric support members for supporting the center conductor in contact with the center conductor and enclosed within the outer conductor; and a core volume between the center conductor and the outer conductor, wherein the core volume is under vacuum or in a gas state. Also provided are methods of forming coaxial waveguide microstructures by a sequential build process and hermetic packages which include a coaxial waveguide microstructure.

Abstract translation: 提供同轴波导微结构。 微结构包括设置在衬底上方的衬底和同轴波导。 同轴波导包括：中心导体; 包括一个或多个壁的外导体，与中心导体间隔开并设置在中心导体周围; 一个或多个电介质支撑构件，用于支撑与中心导体接触并封闭在外部导体内的中心导体; 以及中心导体和外部导体之间的芯体积，其中芯体积处​​于真空状态或气体状态。 还提供了通过顺序构建工艺形成同轴波导微结构的方法和包括同轴波导微结构的密封封装。

公开(公告)号：US20110210807A1

公开(公告)日：2011-09-01

申请号：US13085124

申请日：2011-04-12

Applicant: David W. Sherrer ,  John J. Fisher

Inventor： David W. Sherrer ,  John J. Fisher

IPC: H01P3/00 ,  H01R43/00

CPC classification number: H01P3/06 ,  H01P1/08 ,  H01P3/00 ,  H01P5/103 ,  H01P5/183 ,  H01P11/002 ,  H01P11/003 ,  H01P11/005 ,  H05K1/0221 ,  H05K1/0272 ,  H05K3/4644 ,  H05K3/4685 ,  H05K2201/09809 ,  Y10T29/49117 ,  Y10T29/49123

Abstract: Provided are coaxial waveguide microstructures. The microstructures include a substrate and a coaxial waveguide disposed above the substrate. The coaxial waveguide includes: a center conductor; an outer conductor including one or more walls, spaced apart from and disposed around the center conductor; one or more dielectric support members for supporting the center conductor in contact with the center conductor and enclosed within the outer conductor; and a core volume between the center conductor and the outer conductor, wherein the core volume is under vacuum or in a gas state. Also provided are methods of forming coaxial waveguide microstructures by a sequential build process and hermetic packages which include a coaxial waveguide microstructure.

Abstract translation: 提供同轴波导微结构。 微结构包括设置在衬底上方的衬底和同轴波导。 同轴波导包括：中心导体; 包括一个或多个壁的外导体，与中心导体间隔开并设置在中心导体周围; 一个或多个电介质支撑构件，用于支撑与中心导体接触并封闭在外部导体内的中心导体; 以及中心导体和外部导体之间的芯体积，其中芯体积处​​于真空状态或气体状态。 还提供了通过顺序构建工艺形成同轴波导微结构的方法和包括同轴波导微结构的密封封装。

公开(公告)号：US20090058569A1

公开(公告)日：2009-03-05

申请号：US12214785

申请日：2008-06-20

Applicant: David W. Sherrer ,  John J. Fisher

Inventor： David W. Sherrer ,  John J. Fisher

IPC: H01P3/06

CPC classification number: H01P3/06 ,  H01P1/08 ,  H01P3/00 ,  H01P5/103 ,  H01P5/183 ,  H01P11/002 ,  H01P11/003 ,  H01P11/005 ,  H05K1/0221 ,  H05K1/0272 ,  H05K3/4644 ,  H05K3/4685 ,  H05K2201/09809 ,  Y10T29/49117 ,  Y10T29/49123

Abstract: Provided are coaxial waveguide microstructures. The microstructures include a substrate and a coaxial waveguide disposed above the substrate. The coaxial waveguide includes: a center conductor; an outer conductor including one or more walls, spaced apart from and disposed around the center conductor; one or more dielectric support members for supporting the center conductor in contact with the center conductor and enclosed within the outer conductor; and a core volume between the center conductor and the outer conductor, wherein the core volume is under vacuum or in a gas state. Also provided are methods of forming coaxial waveguide microstructures by a sequential build process and hermetic packages which include a coaxial waveguide microstructure.

Abstract translation: 提供同轴波导微结构。 微结构包括设置在衬底上方的衬底和同轴波导。 同轴波导包括：中心导体; 包括一个或多个壁的外导体，与中心导体间隔开并设置在中心导体周围; 一个或多个电介质支撑构件，用于支撑与中心导体接触并封闭在外部导体内的中心导体; 以及中心导体和外部导体之间的芯体积，其中芯体积处​​于真空状态或气体状态。 还提供了通过顺序构建工艺形成同轴波导微结构的方法和包括同轴波导微结构的密封封装。