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公开(公告)号：US12063867B2
公开(公告)日：2024-08-13
申请号：US17394752
申请日：2021-08-05
Applicant: International Business Machines Corporation
Inventor： Pouya Hashemi , Chandrasekharan Kothandaraman , Nathan P. Marchack
Abstract: An approach to provide a structure of a double magnetic tunnel junction device with two spacers that includes a bottom magnetic tunnel junction stack, a spin conducting layer on the bottom magnetic tunnel junction stack, a top magnetic tunnel junction stack on the spin conduction layer, a first dielectric spacer on sides of the top magnetic tunnel junction stack and a portion of a top surface of the spin conduction layer, and a second dielectric spacer on the first spacer. The double magnetic tunnel device includes the top magnetic tunnel junction stack with a width that is less than the width of the bottom magnetic tunnel junction stack.
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公开(公告)号：US11205015B2
公开(公告)日：2021-12-21
申请号：US16288542
申请日：2019-02-28
Applicant: International Business Machines Corporation
Inventor： Chandrasekharan Kothandaraman , Dimitri Houssameddine , Bruce B. Doris
Abstract: A memory system in an integrated circuit and a method of operation. The system includes multiple magnetic tunnel junction (MTJ) structures, each MTJ structure storing a logic value according to a resistive state. A selection switch device associated with a respective MTJ structure is activated to select one of the multiple MTJ structures at a time. An output circuit is configured to sense the resistive state of a selected MTJ structure, the output circuit having a selectable input reference resistance value according to a selected first reference resistance or a second reference resistance value, and outputting a first logic value of the selected MTJ structure responsive to a resistive state of the MTJ structure and a selected first resistance reference value, or alternately outputting a second logic value of the selected MTJ structure responsive to the resistive state of the MTJ structure and a selected second resistance reference value.
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公开(公告)号：US20210151503A1
公开(公告)日：2021-05-20
申请号：US17136648
申请日：2020-12-29
Applicant: International Business Machines Corporation
Inventor： Pouya Hashemi , Bruce B.` Doris , Chandrasekharan Kothandaraman , Nathan P. Marchack
Abstract: A semiconductor structure and fabrication method of forming a semiconductor structure. The structure is a MRAM element having a first conductive electrode embedded in a first interconnect dielectric material layer upon which a multi-layered magnetic tunnel junction (MTJ) memory element is formed in a magnetoresistive random access memory (MRAM) device area. The first conductive electrode includes a first end having a top surface of a first surface area and a second end having a bottom surface of a second surface area, the first surface area being smaller than the second surface area. The second end of the bottom electrode includes a barrier liner material including a metal fill material, and the first end of the bottom electrode is a pillar structure formed as a result of an etchback process in which the metal barrier liner is recessed relative to the metal fill material.
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公开(公告)号：US10937828B2
公开(公告)日：2021-03-02
申请号：US16157970
申请日：2018-10-11
Applicant: International Business Machines Corporation
Inventor： Pouya Hashemi , Matthias Georg Gottwald , Alexander Reznicek , Chandrasekharan Kothandaraman
Abstract: Fabricating a magnetoresistive random access memory (MRAM) device includes receiving a wafer structure having a first inter-layer dielectric (ILD) layer and a metal material disposed within the first ILD layer. A second ILD layer is deposited upon a top surface of the first ILD layer and the metal material. A trench is formed within the second ILD layer extending to the top surface of the metal material. A plurality of magnetic stack layers of a magnetic stack and an electrode layer are deposited within the trench. Portions of each of the magnetic stack layers of the magnetic stack and the electrode layer are removed to form a v-shaped magnetic tunnel junction (MTJ) in contact with the metal material.
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公开(公告)号：US20200279058A1
公开(公告)日：2020-09-03
申请号：US16288542
申请日：2019-02-28
Applicant: International Business Machines Corporation
Inventor： Chandrasekharan Kothandaraman , Dimitri Houssameddine , Bruce B. Doris
Abstract: A memory system in an integrated circuit and a method of operation. The system includes multiple magnetic tunnel junction (MTJ) structures, each MTJ structure storing a logic value according to a resistive state. A selection switch device associated with a respective MTJ structure is activated to select one of the multiple MTJ structures at a time. An output circuit is configured to sense the resistive state of a selected MTJ structure, the output circuit having a selectable input reference resistance value according to a selected first reference resistance or a second reference resistance value, and outputting a first logic value of the selected MTJ structure responsive to a resistive state of the MTJ structure and a selected first resistance reference value, or alternately outputting a second logic value of the selected MTJ structure responsive to the resistive state of the MTJ structure and a selected second resistance reference value.
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Patent Agency Ranking
公开(公告)号：US10727398B1
公开(公告)日：2020-07-28
申请号：US16262437
申请日：2019-01-30
Applicant: International Business Machines Corporation
Inventor： Nathan P. Marchack , Bruce B. Doris , Chandrasekharan Kothandaraman
Abstract: A magnetic tunnel junction (MTJ) containing device is provided in which a bottom electrode having a small CD is formed and is located laterally adjacent to diamond like carbon (DLC). DLC replaces a material stack of, from bottom to top, a silicon nitride layer and an organic planarization layer (OPL) which is typically used in providing a conductive structure having a reduced CD. DLC provides a higher etch resistance to IBE than silicon nitride, but DLC can be patterned using conventional etchants. The use of DLC thus reduces the number of processing steps for providing a reduced CD bottom electrode, and also provides a more robust solution to the issue of punch through to an underlying conductive material layer.
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7.发明申请公开(公告)号：US20200217735A1
公开(公告)日：2020-07-09
申请号：US16241543
申请日：2019-01-07
Applicant: International Business Machines Corporation
Inventor： Virat Vasav Mehta , Alexander Reznicek , Chandrasekharan Kothandaraman , Eric Raymond Evarts , Pouya Hashemi
Abstract: A sub-micrometer pressure sensor is provided that includes a multilayered magnetic tunnel junction (MTJ) pillar that contains a non-magnetic metallic spacer separating a first magnetic free layer from a second magnetic free layer. The presence of the non-magnetic metallic spacer in the multilayered MTJ pillar improves the sensitivity without compromising area, and makes the pressure sensor binary (either “on” or “off”) with little or no drift, and sensitivity change over time. Moreover, the resistivity switch in such a pressure sensor is instantly and a low error rate is observed.
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公开(公告)号：US10700263B2
公开(公告)日：2020-06-30
申请号：US15886232
申请日：2018-02-01
Applicant: International Business Machines Corporation
Inventor： Anthony J. Annunziata , Chandrasekharan Kothandaraman , Janusz J. Nowak , Eugene J. O'Sullivan
Abstract: A semiconductor device and a method for fabricating the same. The semiconductor device includes a substrate. At least one trench line is formed within the substrate. A pad layer is formed in contact with the at least one trench line. A seed layer is formed on and in contact with the pad layer. The seed layer has a Root Mean Square surface roughness equal to or less than 3 Angstroms. A magnetic tunnel junction stack is formed on and in contact with the seed layer. The method includes forming a seed layer on and in contact with a semiconductor structure. The seed layer is annealed and then planarized. A magnetic tunnel junction stack is formed on and in contact with the seed layer after the seed layer has been planarized.
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公开(公告)号：US10374152B2
公开(公告)日：2019-08-06
申请号：US15231168
申请日：2016-08-08
Applicant: International Business Machines Corporation
Abstract: Magnetic tunnel junction antifuse devices are protected from degradation caused by programming voltage drop across the gates of unselected magnetic tunnel junction antifuses by connecting said magnetic tunnel junctions serially with a first field effect transistor and a second field effect transistor, the first field effect transistor having its gate connected to a positive supply voltage while the gate of the second field effect transistor is switchably connected to a programming voltage, such that when the second field effect transistor of a selected magnetic tunnel junction is switched to direct the programming voltage to program the selected magnetic tunnel junction an unswitched magnetic tunnel junction and the second field effect transistor do not experience a voltage drop across the gates thereof sufficient to degrade.
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公开(公告)号：US20180239590A1
公开(公告)日：2018-08-23
申请号：US15440278
申请日：2017-02-23
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Suyog Gupta , Chandrasekharan Kothandaraman , Jonathan Z. Sun
Abstract: An apparatus is presented for generating a true random number generator (TRNG). The apparatus includes a magnetic tunnel junction (MTJ) device including a first layer, a second layer, and third layer, as well as a bias circuit to bias the MTJ device along with a pulse height discriminator and a time-to-amplitude convertor to generate random bit-streams. The second layer is a barrier layer with an energy barrier height in the order of 20kT, where k is the Boltzmann constant and T is the absolute temperature. Random flipping of an orientation of magnetization of the third layer is induced by thermal fluctuations in the MTJ device.
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