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公开(公告)号:US09805790B2
公开(公告)日:2017-10-31
申请号:US15025229
申请日:2013-12-05
Applicant: Intel Corporation
Inventor: Nathaniel J. August , Pulkit Jain , Stefan Rusu , Fatih Hamzaoglu , Rangharajan Venkatesan , Muhammad Khellah , Charles Augustine , Carlos Tokunaga , James W. Tschanz , Yih Wang
CPC classification number: G11C13/0061 , G11C11/161 , G11C11/1657 , G11C11/1659 , G11C11/1675 , G11C11/1693 , G11C13/0011 , G11C13/0014 , G11C14/0081 , G11C14/009
Abstract: Described is an apparatus including memory cell with retention using resistive memory. The apparatus comprises: memory element including a first inverting device cross-coupled to a second inverting device; a restore circuit having at least one resistive memory element, the restore circuit coupled to an output of the first inverting device; a third inverting device coupled to the output of the first inverting device; a fourth inverting device coupled to an output of the third inverting device; and a save circuit having at least one resistive memory element, the save circuit coupled to an output of the third inverting device.