公开(公告)号：US20220084981A1

公开(公告)日：2022-03-17

申请号：US17020199

申请日：2020-09-14

Applicant: Infineon Technologies Austria AG

Inventor： Victor Verdugo ,  Katrin Schmidt ,  Steffen Schmidt ,  Markus Schmitt

IPC: H01L23/00 ,  B23K1/00

Abstract: A method of soldering elements together includes providing a substrate having a metal die attach surface, providing a semiconductor die that is configured as a power semiconductor device and having a semiconductor body, a rear side metallization, and a front side layer stack, the front side layer stack having a front side metallization and a contaminant protection layer, arranging the semiconductor die on the substrate with a region of solder material between the die attach surface and the rear side metallization, and performing a soldering process that reflows the region of solder material to form a soldered joint between the metal die attach surface and the rear side metallization, wherein the soldering process comprises applying mechanical pressure to the front side metallization, and wherein the contaminant protection layer is configured to prevent transmission of contaminants into the semiconductor body after the soldering process is completed.

公开(公告)号：US20230197674A1

公开(公告)日：2023-06-22

申请号：US18111328

申请日：2023-02-17

Applicant: Infineon Technologies Austria AG

Inventor： Victor Verdugo ,  Katrin Schmidt ,  Steffen Schmidt ,  Markus Schmitt

IPC: H01L23/00 ,  B23K1/00 ,  H01L29/417 ,  H01L29/45 ,  H01L29/51

CPC classification number: H01L24/83 ,  B23K1/0016 ,  H01L24/29 ,  H01L24/32 ,  H01L29/41741 ,  H01L29/456 ,  H01L29/51 ,  B23K2101/40

Abstract: A semiconductor assembly includes a substrate including a metal die attach surface, a semiconductor die that is arranged on the substrate, the semiconductor die being configured as a power semiconductor device and comprising a semiconductor body, a rear side metallization, and a front side layer stack, the front side layer stack comprising a front side metallization and a contaminant protection layer that is between the front side metallization and the semiconductor body, and a diffusion soldered joint between the metal die attach surface and the rear side metallization, the diffusion soldered joint comprising one or more intermetallic phases throughout the diffusion soldered joint, wherein the contaminant protection layer is configured to prevent transmission of contaminants into the semiconductor body.

公开(公告)号：US12087723B2

公开(公告)日：2024-09-10

申请号：US18111328

申请日：2023-02-17

Applicant: Infineon Technologies Austria AG

Inventor： Victor Verdugo ,  Katrin Schmidt ,  Steffen Schmidt ,  Markus Schmitt

IPC: H01L23/00 ,  B23K1/00 ,  H01L29/417 ,  H01L29/45 ,  H01L29/51 ,  B23K101/40

CPC classification number: H01L24/32 ,  B23K1/0016 ,  H01L24/83 ,  H01L29/41741 ,  H01L29/456 ,  H01L29/51 ,  B23K2101/40 ,  H01L2224/29083 ,  H01L2224/29166 ,  H01L2224/29184 ,  H01L2224/29205 ,  H01L2224/29209 ,  H01L2224/29211 ,  H01L2224/29213 ,  H01L2224/29217 ,  H01L2224/29218 ,  H01L2224/2922 ,  H01L2224/29239 ,  H01L2224/29244 ,  H01L2224/29247 ,  H01L2224/32227 ,  H01L2224/32245 ,  H01L2224/32503 ,  H01L2224/83201 ,  H01L2224/83203 ,  H01L2224/8321 ,  H01L2224/8381 ,  H01L2224/8382

Abstract: A semiconductor assembly includes a substrate including a metal die attach surface, a semiconductor die that is arranged on the substrate, the semiconductor die being configured as a power semiconductor device and comprising a semiconductor body, a rear side metallization, and a front side layer stack, the front side layer stack comprising a front side metallization and a contaminant protection layer that is between the front side metallization and the semiconductor body, and a diffusion soldered joint between the metal die attach surface and the rear side metallization, the diffusion soldered joint comprising one or more intermetallic phases throughout the diffusion soldered joint, wherein the contaminant protection layer is configured to prevent transmission of contaminants into the semiconductor body.

公开(公告)号：US11610861B2

公开(公告)日：2023-03-21

申请号：US17020199

申请日：2020-09-14

Applicant: Infineon Technologies Austria AG

Inventor： Victor Verdugo ,  Katrin Schmidt ,  Steffen Schmidt ,  Markus Schmitt

IPC: H01L23/00 ,  B23K1/00 ,  H01L29/417 ,  H01L29/45 ,  H01L29/51 ,  B23K101/40

Abstract: A method of soldering elements together includes providing a substrate having a metal die attach surface, providing a semiconductor die that is configured as a power semiconductor device and having a semiconductor body, a rear side metallization, and a front side layer stack, the front side layer stack having a front side metallization and a contaminant protection layer, arranging the semiconductor die on the substrate with a region of solder material between the die attach surface and the rear side metallization, and performing a soldering process that reflows the region of solder material to form a soldered joint between the metal die attach surface and the rear side metallization, wherein the soldering process comprises applying mechanical pressure to the front side metallization.