公开(公告)号：US11929430B2

公开(公告)日：2024-03-12

申请号：US17563329

申请日：2021-12-28

申请人： Infineon Technologies Austria AG

发明人： Thomas Detzel ,  Gerhard Prechtl ,  Oliver Haeberlen

IPC分类号： H01L29/778 ,  H01L21/02 ,  H01L29/10 ,  H01L29/20 ,  H01L29/205 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66

CPC分类号： H01L29/7786 ,  H01L21/0254 ,  H01L29/1029 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/402 ,  H01L29/41791 ,  H01L29/42316 ,  H01L29/66462

摘要： A method includes providing a semiconductor body including a plurality of two-dimensional charge carrier gas channels, forming a gate fin by forming a pair of gate trenches in an upper surface of the semiconductor body, the pair of gate trenches exposing each one of two-dimensional charge carrier gas channels, providing source and drain contacts that are electrically connected to each one of the plurality of two-dimensional charge carrier gas channels, providing a gate structure that is configured to control a conductive connection between the source and drain contacts, wherein providing the gate structure includes forming a layer of doped type III-nitride semiconductor material that covers the gate fin and extends into the gate trenches, and forming a conductive gate electrode on top of the layer of doped type III-nitride semiconductor material.

公开(公告)号：US10516023B2

公开(公告)日：2019-12-24

申请号：US15913284

申请日：2018-03-06

申请人： Infineon Technologies Austria AG

发明人： Gilberto Curatola ,  Oliver Haeberlen

IPC分类号： H01L29/417 ,  H01L29/20 ,  H01L29/205 ,  H01L21/74 ,  H01L29/66 ,  H01L29/778

摘要： A method of forming a semiconductor device includes providing a heterojunction semiconductor body. The heterojunction semiconductor body includes a type III-V semiconductor back-barrier region, a type III-V semiconductor channel layer formed on the back-barrier region, and a type III-V semiconductor barrier layer formed on the back-barrier region. A first two-dimensional charge carrier gas is at an interface between the channel and barrier layers. A second two-dimensional charge carrier gas is disposed below the first two-dimensional charge carrier gas. A deep contact structure in the heterojunction semiconductor body that extends through the channel layer and forms an interface with the second two-dimensional charge carrier gas is formed. The first semiconductor region includes a first contact material that provides a conductive path for majority carriers of the second two-dimensional charge carrier gas at the interface with the second two-dimensional charge carrier gas.

公开(公告)号：US10068780B2

公开(公告)日：2018-09-04

申请号：US15215208

申请日：2016-07-20

申请人： Infineon Technologies Austria AG

发明人： Gerhard Prechtl ,  Oliver Haeberlen ,  Balamurugan Karunamurthy

IPC分类号： H01L21/56 ,  H01L23/495 ,  H01L29/778 ,  H01L29/423 ,  H01L29/08 ,  H01L29/20

摘要： A semiconductor component includes a semiconductor chip including a first semiconductor body comprising silicon and a second semiconductor body attached to an upper side of the first semiconductor body and comprising a III-nitride, and a lead-frame connected with the first semiconductor body. A thickness ratio between a thickness of the semiconductor chip and a thickness of the lead-frame is smaller than 1.3 or larger than 1.9.

公开(公告)号：US09728630B2

公开(公告)日：2017-08-08

申请号：US14478287

申请日：2014-09-05

申请人： Infineon Technologies Austria AG

发明人： Gerhard Prechtl ,  Clemens Ostermaier ,  Oliver Haeberlen

IPC分类号： H01L29/778 ,  H01L21/02 ,  H01L21/306 ,  H01L29/06 ,  H01L29/20 ,  H01L29/205 ,  H01L29/40 ,  H01L29/66 ,  H01L29/10

CPC分类号： H01L29/7787 ,  H01L21/0254 ,  H01L21/30612 ,  H01L21/30621 ,  H01L29/0657 ,  H01L29/1075 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/407 ,  H01L29/66462 ,  H01L29/7786

摘要： A high-electron-mobility field effect transistor is formed with a buffer region having a stepped lateral profile, the stepped lateral profile having first, second and third cross-sections of the buffer region, the first cross-section being thicker than the third cross-section and including a buried field plate, the second cross-section interposed between the first and third cross-sections and forming oblique angles with the first and third cross-sections. A barrier region is formed along the stepped lateral profile. The barrier region is separated from the buried field plate by a portion of the buffer region. The buffer region is formed from a first semiconductor material and the barrier region is formed from a second semiconductor material. The first and second semiconductor materials have different band-gaps such that an electrically conductive channel of a two-dimensional charge carrier gas arises at an interface between the buffer and barrier regions.

公开(公告)号：US20170194230A1

公开(公告)日：2017-07-06

申请号：US14985868

申请日：2015-12-31

申请人： Infineon Technologies Austria AG

发明人： Gerhard Prechtl ,  Oliver Haeberlen

IPC分类号： H01L23/31 ,  H01L23/58 ,  H01L23/29 ,  H01L29/20 ,  H01L29/778 ,  H01L21/56 ,  H01L21/78 ,  H01L21/02 ,  H01L21/306 ,  H01L23/00 ,  H01L21/3205

CPC分类号： H01L23/3192 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/30612 ,  H01L21/32051 ,  H01L21/56 ,  H01L21/78 ,  H01L23/291 ,  H01L23/3171 ,  H01L23/562 ,  H01L23/564 ,  H01L23/585 ,  H01L29/2003 ,  H01L29/7787

摘要： A semiconductor die includes an III-V semiconductor body having a periphery devoid of active devices, the periphery terminating at an edge face of the semiconductor die. The semiconductor die further includes a seal ring structure above the periphery of the III-V semiconductor body and a barrier. The barrier is disposed over the periphery of the III-V semiconductor body at least between the seal ring structure and the edge face of the semiconductor die. The barrier has a density which prevents water, water ions, sodium ions and potassium ions from diffusing through the barrier.

公开(公告)号：US20170186600A1

公开(公告)日：2017-06-29

申请号：US14757896

申请日：2015-12-24

申请人： Infineon Technologies Austria AG

发明人： Clemens Ostermaier ,  Gerhard Prechtl ,  Oliver Haeberlen

IPC分类号： H01L21/02 ,  H01L21/308 ,  H01L29/20 ,  H01L29/06 ,  H01L21/304 ,  H01L21/306

CPC分类号： H01L21/0254 ,  C30B15/34 ,  C30B29/406 ,  C30B33/08 ,  H01L21/02021 ,  H01L21/02087 ,  H01L21/0209 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/0245 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02494 ,  H01L21/02513 ,  H01L21/304 ,  H01L21/30612 ,  H01L21/3086 ,  H01L29/0657 ,  H01L29/0692 ,  H01L29/2003 ,  H01L29/7786 ,  H01L31/1848 ,  H01L31/1856

摘要： In an embodiment, a method includes treating an edge region of a wafer including a substrate having an upper surface and one or more epitaxial Group III nitride layers arranged on the upper surface of the substrate, so as to remove material including at least one Group III element from the edge region.

公开(公告)号：US20170148883A1

公开(公告)日：2017-05-25

申请号：US15402581

申请日：2017-01-10

申请人： Infineon Technologies Austria AG

发明人： Gilberto Curatola ,  Oliver Haeberlen ,  Simone Lavanga ,  Gianmauro Pozzovivo ,  Fabian Reiher

IPC分类号： H01L29/40 ,  H01L23/482 ,  H01L29/20 ,  H01L21/308 ,  H01L29/66 ,  H01L21/311 ,  H01L21/306 ,  H01L29/778 ,  H01L29/205

CPC分类号： H01L29/408 ,  H01L21/30612 ,  H01L21/308 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/76224 ,  H01L23/4824 ,  H01L29/0653 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/518 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/778 ,  H01L29/7786 ,  H01L29/7787

摘要： A semiconductor device includes a device region including a compound semiconductor material and a non-device region at least partially surrounding the device region. The semiconductor device further includes a dielectric material in the non-device region and at least one electrode in the device region. The semiconductor device further includes at least one pad electrically coupled to the at least one electrode, wherein the at least one pad is arranged on the dielectric material in the non-device region.

公开(公告)号：US20160260817A1

公开(公告)日：2016-09-08

申请号：US14637610

申请日：2015-03-04

申请人： Infineon Technologies Austria AG

发明人： Maria Reiner ,  Clemens Ostermaier ,  Peter Lagger ,  Gerhard Prechtl ,  Oliver Haeberlen ,  Josef Schellander ,  Guenter Denifl ,  Michael Stadtmueller

IPC分类号： H01L29/66 ,  H01L21/223

CPC分类号： H01L29/66462 ,  H01L21/2233 ,  H01L21/2236 ,  H01L21/28264 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/4236 ,  H01L29/66522 ,  H01L29/7786

摘要： A substrate having a buffer layer and a barrier layer is formed. The buffer and barrier layers have different bandgaps such that an electrically conductive channel comprising a two-dimensional charge carrier gas arises at an interface between the buffer and barrier layers due to piezoelectric effects. The substrate is placed in a fluorine containing gas mixture that includes free radical state fluorine particles and is substantially devoid of ionic state fluorine particles. A first lateral surface section of the substrate is exposed to the gas mixture such that the free radical state fluorine particles contact the first lateral surface section without penetrating the substrate. A semiconductor device that incorporates first lateral surface section in the structure of the device is formed in the substrate.

摘要翻译： 形成具有缓冲层和阻挡层的基板。 缓冲层和阻挡层具有不同的带隙，使得由于压电效应，在缓冲层和阻挡层之间的界面处产生包括二维电荷载气的导电沟道。 将基板置于包含自由基状态的氟颗粒的含氟气体混合物中，并且基本上不含离子状态的氟颗粒。 衬底的第一侧表面部分暴露于气体混合物，使得自由基状态的氟颗粒与第一侧表面部分接触而不穿透衬底。 在衬底中形成包括器件结构中的第一侧表面部分的半导体器件。

公开(公告)号：US09263545B2

公开(公告)日：2016-02-16

申请号：US14730536

申请日：2015-06-04

申请人： Infineon Technologies Austria AG

发明人： Clemens Ostermaier ,  Gerhard Prechtl ,  Oliver Haeberlen

IPC分类号： H01L29/778 ,  H01L21/762 ,  H01L29/66 ,  H01L21/76 ,  H01L29/06

CPC分类号： H01L29/7787 ,  H01L21/7605 ,  H01L21/76224 ,  H01L21/76264 ,  H01L21/76283 ,  H01L23/481 ,  H01L29/0642 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/41766 ,  H01L29/66462 ,  H01L29/7783 ,  H01L29/7786 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of manufacturing a semiconductor device includes forming a semiconductor body including a compound semiconductor material on a substrate, the compound semiconductor material having a channel region, forming a source region extending to the compound semiconductor material, forming a drain region extending to the compound semiconductor material and spaced apart from the source region by the channel region, and forming an insulating region buried in the semiconductor body below the channel region between the compound semiconductor material and the substrate in an active region of the semiconductor device such that the channel region is uninterrupted by the insulating region. The active region includes the source, the drain and the channel region. The insulating region is discontinuous over a length of the channel region between the source region and the drain region.

摘要翻译： 一种制造半导体器件的方法包括在衬底上形成包括化合物半导体材料的半导体本体，所述化合物半导体材料具有沟道区，形成延伸至化合物半导体材料的源极区，形成延伸至化合物半导体的漏极区 材料，并且通过沟道区域与源极区隔开，并且在半导体器件的有源区域中，在化合物半导体材料和衬底之间的沟道区域下面形成绝缘区域，使得沟道区域不间断 通过绝缘区域。 有源区包括源极，漏极和沟道区域。 绝缘区域在源极区域和漏极区域之间的沟道区域的长度上是不连续的。

公开(公告)号：US20150255590A1

公开(公告)日：2015-09-10

申请号：US14699785

申请日：2015-04-29

申请人： Infineon Technologies Austria AG

发明人： Clemens Ostermaier ,  Gerhard Prechtl ,  Oliver Haeberlen

IPC分类号： H01L29/778 ,  H01L29/06 ,  H01L29/205

CPC分类号： H01L29/7786 ,  H01L29/0646 ,  H01L29/0657 ,  H01L29/0688 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/42316 ,  H01L29/42356 ,  H01L29/4236 ,  H01L29/7783 ,  H01L29/7787

摘要： A Group III-nitride-based enhancement mode transistor having a heterojunction fin structure and a corresponding semiconductor device are described.

摘要翻译： 描述了具有异质结翅片结构的III族氮化物基增强型晶体管和相应的半导体器件。